[PATCH] D18996: [PPC] Enable shuffling of VSX vectors

[Guozhi Wei via llvm-commits]

Carrot added inline comments.

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Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:11928
@@ -11929,3 +11927,3 @@
 }
 
 Sched::Preference PPCTargetLowering::getSchedulingPreference(SDNode *N) const {
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hfinkel wrote:
> You can remove this too:
> 
>   if (VT == MVT::v2i64)
>     return Subtarget.hasDirectMove(); // Don't need stack ops with direct moves
> 
> With that, LGTM.
Remove this line will cause test/CodeGen/PowerPC/vsx.ll:test80 fail. This statement uses Subtarget.hasDirectMove() to decide if shuffling is used when building a vector with 2 integers. If there is a direct move instruction (power8), the integer value can be moved to vector registers and merged. If there is no direct move instruction (power7), no shuffling is used, the integer value can only be stored to memory, and loaded to vector register.


http://reviews.llvm.org/D18996