[PATCH] D19449: Add optimization bisect opt-in calls for ARM passes

[Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL267480: Add optimization bisect opt-in calls for ARM passes (authored by akaylor).

Changed prior to commit:
  http://reviews.llvm.org/D19449?vs=54753&id=54920#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D19449

Files:
  llvm/trunk/lib/Target/ARM/A15SDOptimizer.cpp
  llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
  llvm/trunk/lib/Target/ARM/ARMOptimizeBarriersPass.cpp
  llvm/trunk/lib/Target/ARM/MLxExpansionPass.cpp
  llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp

Index: llvm/trunk/lib/Target/ARM/ARMOptimizeBarriersPass.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/ARMOptimizeBarriersPass.cpp
+++ llvm/trunk/lib/Target/ARM/ARMOptimizeBarriersPass.cpp
@@ -51,6 +51,9 @@
 }
 
 bool ARMOptimizeBarriersPass::runOnMachineFunction(MachineFunction &MF) {
+  if (skipFunction(*MF.getFunction()))
+    return false;
+
   // Vector to store the DMBs we will remove after the first iteration
   std::vector<MachineInstr *> ToRemove;
   // DMBType is the Imm value of the first operand. It determines whether it's a
Index: llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp
+++ llvm/trunk/lib/Target/ARM/Thumb2SizeReduction.cpp
@@ -1025,7 +1025,8 @@
 }
 
 bool Thumb2SizeReduce::runOnMachineFunction(MachineFunction &MF) {
-  if (PredicateFtor && !PredicateFtor(*MF.getFunction()))
+  if (skipFunction(*MF.getFunction()) ||
+      PredicateFtor && !PredicateFtor(*MF.getFunction()))
     return false;
 
   STI = &static_cast<const ARMSubtarget &>(MF.getSubtarget());
Index: llvm/trunk/lib/Target/ARM/MLxExpansionPass.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/MLxExpansionPass.cpp
+++ llvm/trunk/lib/Target/ARM/MLxExpansionPass.cpp
@@ -378,6 +378,9 @@
 }
 
 bool MLxExpansion::runOnMachineFunction(MachineFunction &Fn) {
+  if (skipFunction(*Fn.getFunction()))
+    return false;
+
   TII = static_cast<const ARMBaseInstrInfo *>(Fn.getSubtarget().getInstrInfo());
   TRI = Fn.getSubtarget().getRegisterInfo();
   MRI = &Fn.getRegInfo();
Index: llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -1887,6 +1887,9 @@
 }
 
 bool ARMLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
+  if (skipFunction(*Fn.getFunction()))
+    return false;
+
   MF = &Fn;
   STI = &static_cast<const ARMSubtarget &>(Fn.getSubtarget());
   TL = STI->getTargetLowering();
@@ -1962,7 +1965,7 @@
                 ARM_PREALLOC_LOAD_STORE_OPT_NAME, false, false)
 
 bool ARMPreAllocLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
-  if (AssumeMisalignedLoadStores)
+  if (AssumeMisalignedLoadStores || skipFunction(*Fn.getFunction()))
     return false;
 
   TD = &Fn.getDataLayout();
Index: llvm/trunk/lib/Target/ARM/A15SDOptimizer.cpp
===================================================================
--- llvm/trunk/lib/Target/ARM/A15SDOptimizer.cpp
+++ llvm/trunk/lib/Target/ARM/A15SDOptimizer.cpp
@@ -681,6 +681,9 @@
 }
 
 bool A15SDOptimizer::runOnMachineFunction(MachineFunction &Fn) {
+  if (skipFunction(*Fn.getFunction()))
+    return false;
+
   const ARMSubtarget &STI = Fn.getSubtarget<ARMSubtarget>();
   // Since the A15SDOptimizer pass can insert VDUP instructions, it can only be
   // enabled when NEON is available.


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