[PATCH] D19428: AMDGPU: Define priorities for register classes

[Matt Arsenault via llvm-commits]

arsenm added inline comments.

================
Comment at: lib/Target/AMDGPU/SIRegisterInfo.td:266-269
@@ -260,5 +265,6 @@
 def TTMP_64 : RegisterClass<"AMDGPU", [v2i32, i64, f64], 32, (add TTMP_64Regs)> {
   let isAllocatable = 0;
+  let AllocationPriority = 2;
 }
 
 def SReg_64 : RegisterClass<"AMDGPU", [v2i32, i64, f64, i1], 32,
----------------
Does it matter on the nonallocatable classes?


Repository:
  rL LLVM

http://reviews.llvm.org/D19428