[PATCH] D18751: [MachineCombiner] Support for floating-point FMA on ARM64

Gerolf Hoflehner via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 21 19:20:38 PDT 2016


Gerolf marked 3 inline comments as done.
Gerolf added a comment.

Thanks, Quentin! I should have addressed all your concerns.


================
Comment at: include/llvm/CodeGen/SelectionDAGTargetInfo.h:145
@@ +144,3 @@
+  virtual bool GenerateFMAsInMachineCombiner(CodeGenOpt::Level OptLevel) const {
+    return false;
+  }
----------------
Done.

================
Comment at: include/llvm/Target/TargetInstrInfo.h:824
@@ +823,3 @@
+  /// \param Pattern - combiner pattern
+  virtual bool isThroughputPattern(MachineCombinerPattern Pattern) const;
+
----------------
qcolombet wrote:
> For the sake of history summarizing the discussion Gerolf and I had offline.
> Long term, we should be smart enough to compute this information by ourselves using the scheduling model. To move forward in the meantime, we have this hook to have the targets emulate that with their own heuristics.
Yes, thanks for that note! I filed rdar://25867823 for the throughput API. 

================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:89
@@ -87,2 +88,3 @@
     SelectionDAG &DAG;
+    const SelectionDAGTargetInfo &STI;
     const TargetLowering &TLI;
----------------
No preference either. I just made it look like TLI and expect more accesses to come.


http://reviews.llvm.org/D18751





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