[llvm] r266875 - [RDF] Consider register as live if any alias is live

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Wed Apr 20 09:33:23 2016
New Revision: 266875

URL: http://llvm.org/viewvc/llvm-project?rev=266875&view=rev
Log:
[RDF] Consider register as live if any alias is live

This only affects the recomputation of kill flags.

Added:
    llvm/trunk/test/CodeGen/Hexagon/rdf-reset-kills.ll
Modified:
    llvm/trunk/lib/Target/Hexagon/RDFLiveness.cpp

Modified: llvm/trunk/lib/Target/Hexagon/RDFLiveness.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/RDFLiveness.cpp?rev=266875&r1=266874&r2=266875&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/RDFLiveness.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/RDFLiveness.cpp Wed Apr 20 09:33:23 2016
@@ -616,8 +616,8 @@ void Liveness::resetKills(MachineBasicBl
       if (!TargetRegisterInfo::isPhysicalRegister(R))
         continue;
       bool IsLive = false;
-      for (MCSubRegIterator SR(R, &TRI, true); SR.isValid(); ++SR) {
-        if (!Live[*SR])
+      for (MCRegAliasIterator AR(R, &TRI, true); AR.isValid(); ++AR) {
+        if (!Live[*AR])
           continue;
         IsLive = true;
         break;

Added: llvm/trunk/test/CodeGen/Hexagon/rdf-reset-kills.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/rdf-reset-kills.ll?rev=266875&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/rdf-reset-kills.ll (added)
+++ llvm/trunk/test/CodeGen/Hexagon/rdf-reset-kills.ll Wed Apr 20 09:33:23 2016
@@ -0,0 +1,28 @@
+; RUN: llc -march=hexagon < %s
+; REQUIRES: asserts
+
+; This test used to crash in register scavenger due to incorrectly set
+; kill flags.
+
+target triple = "hexagon"
+
+define void @foo(i64 %a) #0 {
+entry:
+  %conv.i = and i64 %a, 9218868437227405312
+  %cmp = icmp ne i64 %conv.i, 9218868437227405312
+  %and.i37 = and i64 %a, 4503599627370495
+  %tobool = icmp eq i64 %and.i37, 0
+  %or.cond = or i1 %cmp, %tobool
+  br i1 %or.cond, label %lor.lhs.false, label %if.then
+
+lor.lhs.false:                                    ; preds = %entry
+  br i1 undef, label %return, label %if.then
+
+if.then:                                          ; preds = %lor.lhs.false, %entry
+  br label %return
+
+return:                                           ; preds = %if.then, %lor.lhs.false
+  ret void
+}
+
+attributes #0 = { norecurse nounwind }