[llvm] r266669 - [X86][SSE] Test case for PR2585

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Mon Apr 18 16:07:49 2016
New Revision: 266669

URL: http://llvm.org/viewvc/llvm-project?rev=266669&view=rev
Log:
[X86][SSE] Test case for PR2585

Added:
    llvm/trunk/test/CodeGen/X86/pr2585.ll

Added: llvm/trunk/test/CodeGen/X86/pr2585.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr2585.ll?rev=266669&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr2585.ll (added)
+++ llvm/trunk/test/CodeGen/X86/pr2585.ll Mon Apr 18 16:07:49 2016
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+
+external constant <4 x i32>		; <<4 x i32>*>:0 [#uses=1]
+external constant <4 x i16>		; <<4 x i16>*>:1 [#uses=1]
+
+define internal void @PR2585() {
+; X32-LABEL: PR2585:
+; X32:       # BB#0:
+; X32-NEXT:    pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
+; X32-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
+; X32-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
+; X32-NEXT:    movq %xmm0, __unnamed_2
+; X32-NEXT:    retl
+;
+; X64-LABEL: PR2585:
+; X64:       # BB#0:
+; X64-NEXT:    pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
+; X64-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
+; X64-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
+; X64-NEXT:    movq %xmm0, {{.*}}(%rip)
+; X64-NEXT:    retq
+	load <4 x i32>, <4 x i32>* @0, align 16		; <<4 x i32>>:1 [#uses=1]
+	bitcast <4 x i32> %1 to <8 x i16>		; <<8 x i16>>:2 [#uses=1]
+	shufflevector <8 x i16> %2, <8 x i16> undef, <8 x i32> < i32 0, i32 2, i32 4, i32 6, i32 undef, i32 undef, i32 undef, i32 undef >		; <<8 x i16>>:3 [#uses=1]
+	bitcast <8 x i16> %3 to <2 x i64>		; <<2 x i64>>:4 [#uses=1]
+	extractelement <2 x i64> %4, i32 0		; <i64>:5 [#uses=1]
+	bitcast i64 %5 to <4 x i16>		; <<4 x i16>>:6 [#uses=1]
+	store <4 x i16> %6, <4 x i16>* @1, align 8
+	ret void
+}