[PATCH] D19087: [x86, ppc] prefer comparisons against zero for and+cmp sequences

[Sanjay Patel via llvm-commits]

spatel added a comment.

In http://reviews.llvm.org/D19087#401346, @hfinkel wrote:

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> > X86TargetLowering::LowerToBT() uses computeKnownBits() to know that's a power-of-2 mask.

> 

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> Okay, but in the end, the check used has to match the capabilities of the check used in the backend for lowering. In this case, it needs to use computeKnownBits(). Regardless, in this case, as I understand it, it is not enough to know that the number is some power of 2, we need to know which power of 2.


I don't understand the last statement. For x86, the test case demonstrates that "some power-of-2" is the requirement to avoid impeding lowering to 'bt'. For PPC, I think the requirement is the same - we could use a variable shift instruction (eg, 'rlwnm' rather than 'rlwinm').

If the PPC lowering is not doing that, wouldn't it be considered an optimization bug? I suppose this leads us to the conclusion that we really do need to duplicate isKnownToBeAPowerOfTwo() for SDNodes so everyone can use it.

Alternatively, we could wait even longer to attempt this transform - MachineCombiner? - so we avoid stepping on the other optimization. That looks simple enough for the x86 tests, but PPC would take a lot of work.


http://reviews.llvm.org/D19087