[llvm] r266285 - [mips] Remove duplicate tests and add missing prefixes for *-LABEL checks. NFC.
Vasileios Kalintiris via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 14 02:13:14 PDT 2016
Author: vkalintiris
Date: Thu Apr 14 04:13:13 2016
New Revision: 266285
URL: http://llvm.org/viewvc/llvm-project?rev=266285&view=rev
Log:
[mips] Remove duplicate tests and add missing prefixes for *-LABEL checks. NFC.
Summary:
The only difference between the removed tests and the pre-existing
ones, is the materialization of the zero constant, which shouldn't
matter for these cases.
Reviewers: dsanders, sdardis
Subscribers: dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D18693
Modified:
llvm/trunk/test/CodeGen/Mips/llvm-ir/sdiv.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/srem.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/udiv.ll
llvm/trunk/test/CodeGen/Mips/llvm-ir/urem.ll
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/sdiv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/sdiv.ll?rev=266285&r1=266284&r2=266285&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/sdiv.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/sdiv.ll Thu Apr 14 04:13:13 2016
@@ -1,35 +1,50 @@
; RUN: llc < %s -march=mips -mcpu=mips2 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -check-prefix=GP32
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 \
+; RUN: -check-prefix=NOT-R2-R6 -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -check-prefix=GP32
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 \
+; RUN: -check-prefix=NOT-R2-R6 -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32r2 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=R2-R5 -check-prefix=GP32
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 \
+; RUN: -check-prefix=R2-R5 -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32r3 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=R2-R5 -check-prefix=GP32
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 \
+; RUN: -check-prefix=R2-R5 -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32r5 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=R2-R5 -check-prefix=GP32
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 \
+; RUN: -check-prefix=R2-R5 -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=R6 -check-prefix=GP32
+; RUN: -check-prefix=ALL -check-prefix=R6 \
+; RUN: -check-prefix=GP32
+
; RUN: llc < %s -march=mips64 -mcpu=mips3 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -check-prefix=GP64-NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 \
+; RUN: -check-prefix=NOT-R2-R6 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -check-prefix=GP64-NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 \
+; RUN: -check-prefix=NOT-R2-R6 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6 -check-prefix=GP64-NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 \
+; RUN: -check-prefix=NOT-R2-R6 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r2 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=R2-R5 -check-prefix=GP64-NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 \
+; RUN: -check-prefix=R2-R5 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r3 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=R2-R5 -check-prefix=GP64-NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 \
+; RUN: -check-prefix=R2-R5 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r5 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=R2-R5 -check-prefix=GP64-NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 \
+; RUN: -check-prefix=R2-R5 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=R6 -check-prefix=64R6
+; RUN: -check-prefix=ALL -check-prefix=R6 \
+; RUN: -check-prefix=64R6
+
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=MM -check-prefix=MMR3 -check-prefix=MM32
+; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=MM -check-prefix=MMR6 -check-prefix=MM32
+; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=MM -check-prefix=MMR6 -check-prefix=MM64
+; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define signext i1 @sdiv_i1(i1 signext %a, i1 signext %b) {
entry:
@@ -193,173 +208,3 @@ entry:
%r = sdiv i128 %a, %b
ret i128 %r
}
-
-define signext i1 @sdiv_0_i1(i1 signext %a) {
-entry:
-; ALL-LABEL: sdiv_0_i8:
-
- ; NOT-R6: addiu $[[T0:[0-9]+]], $zero, 0
- ; NOT-R6: div $zero, $4, $[[T0]]
- ; NOT-R6: teq $[[T0]], $zero, 7
- ; NOT-R6: mflo $[[T1:[0-9]+]]
- ; NOT-R6: sll $[[T2:[0-9]+]], $[[T1]], 31
- ; NOT-R6: sra $2, $[[T2]], 31
-
- ; R6: div $[[T0:[0-9]+]], $4, $zero
- ; R6: teq $zero, $zero, 7
- ; R6: sll $[[T1:[0-9]+]], $[[T0]], 31
- ; R6: sra $2, $[[T1]], 31
-
- ; MMR3: lui $[[T0:[0-9]+]], 0
- ; MMR3: div $zero, $4, $[[T0]]
- ; MMR3: teq $[[T0]], $zero, 7
- ; MMR3: mflo $[[T1:[0-9]+]]
- ; MMR3: sll $[[T2:[0-9]+]], $[[T1]], 31
- ; MMR3: sra $2, $[[T2]], 31
-
- ; MMR6: lui $[[T0:[0-9]+]], 0
- ; MMR6: div $[[T1:[0-9]+]], $4, $[[T0]]
- ; MMR6: teq $[[T0]], $zero, 7
- ; MMR6: sll $[[T2:[0-9]+]], $[[T1]], 31
- ; MMR6: sra $2, $[[T2]], 31
-
- %r = sdiv i1 %a, 0
- ret i1 %r
-}
-
-define signext i8 @sdiv_0_i8(i8 signext %a) {
-entry:
-; ALL-LABEL: sdiv_0_i8:
-
- ; NOT-R2-R6: addiu $[[T0:[0-9]+]], $zero, 0
- ; NOT-R2-R6: div $zero, $4, $[[T0]]
- ; NOT-R2-R6: teq $[[T0]], $zero, 7
- ; NOT-R2-R6: mflo $[[T1:[0-9]+]]
- ; NOT-R2-R6: sll $[[T2:[0-9]+]], $[[T1]], 24
- ; NOT-R2-R6: sra $2, $[[T2]], 24
-
- ; R2-R5: addiu $[[T0:[0-9]+]], $zero, 0
- ; R2-R5: div $zero, $4, $[[T0]]
- ; R2-R5: teq $[[T0]], $zero, 7
- ; R2-R5: mflo $[[T1:[0-9]+]]
- ; R2-R5: seb $2, $[[T1]]
-
- ; R6: div $[[T0:[0-9]+]], $4, $zero
- ; R6: teq $zero, $zero, 7
- ; R6: seb $2, $[[T0]]
-
- ; MMR3: lui $[[T0:[0-9]+]], 0
- ; MMR3: div $zero, $4, $[[T0]]
- ; MMR3: teq $[[T0]], $zero, 7
- ; MMR3: mflo $[[T1:[0-9]+]]
- ; MMR3: seb $2, $[[T1]]
-
- ; MMR6: lui $[[T0:[0-9]+]], 0
- ; MMR6: div $[[T1:[0-9]+]], $4, $[[T0]]
- ; MMR6: teq $[[T0]], $zero, 7
- ; MMR6: seb $2, $[[T1]]
-
- %r = sdiv i8 %a, 0
- ret i8 %r
-}
-
-define signext i16 @sdiv_0_i16(i16 signext %a) {
-entry:
-; ALL-LABEL: sdiv_0_i16:
-
- ; NOT-R2-R6: addiu $[[T0:[0-9]+]], $zero, 0
- ; NOT-R2-R6: div $zero, $4, $[[T0]]
- ; NOT-R2-R6: teq $[[T0]], $zero, 7
- ; NOT-R2-R6: mflo $[[T1:[0-9]+]]
- ; NOT-R2-R6: sll $[[T2:[0-9]+]], $[[T1]], 16
- ; NOT-R2-R6: sra $2, $[[T2]], 16
-
- ; R2-R5: addiu $[[T0:[0-9]+]], $zero, 0
- ; R2-R5: div $zero, $4, $[[T0]]
- ; R2-R5: teq $[[T0]], $zero, 7
- ; R2-R5: mflo $[[T1:[0-9]+]]
- ; R2-R5: seh $2, $[[T1]]
-
- ; R6: div $[[T0:[0-9]+]], $4, $zero
- ; R6: teq $zero, $zero, 7
- ; R6: seh $2, $[[T0]]
-
- ; MMR3: lui $[[T0:[0-9]+]], 0
- ; MMR3: div $zero, $4, $[[T0]]
- ; MMR3: teq $[[T0]], $zero, 7
- ; MMR3: mflo $[[T1:[0-9]+]]
- ; MMR3: seh $2, $[[T1]]
-
- ; MMR6: lui $[[T0:[0-9]+]], 0
- ; MMR6: div $[[T1:[0-9]+]], $4, $[[T0]]
- ; MMR6: teq $[[T0]], $zero, 7
- ; MMR6: seh $2, $[[T1]]
-
- %r = sdiv i16 %a, 0
- ret i16 %r
-}
-
-define signext i32 @sdiv_0_i32(i32 signext %a) {
-entry:
-; ALL-LABEL: sdiv_0_i32:
-
- ; NOT-R6: addiu $[[T0:[0-9]+]], $zero, 0
- ; NOT-R6: div $zero, $4, $[[T0]]
- ; NOT-R6: teq $[[T0]], $zero, 7
- ; NOT-R6: mflo $2
-
- ; R6: div $2, $4, $zero
- ; R6: teq $zero, $zero, 7
-
- ; MMR3: lui $[[T0:[0-9]+]], 0
- ; MMR3: div $zero, $4, $[[T0]]
- ; MMR3: teq $[[T0]], $zero, 7
- ; MMR3: mflo $2
-
- ; MMR6: lui $[[T0:[0-9]+]], 0
- ; MMR6: div $2, $4, $[[T0]]
- ; MMR6: teq $[[T0]], $zero, 7
-
- %r = sdiv i32 %a, 0
- ret i32 %r
-}
-
-define signext i64 @sdiv_0_i64(i64 signext %a) {
-entry:
-; ALL-LABEL: sdiv_0_i64:
-
- ; GP32: lw $25, %call16(__divdi3)($gp)
-
- ; GP64-NOT-R6: daddiu $[[T0:[0-9]+]], $zero, 0
- ; GP64-NOT-R6: ddiv $zero, $4, $[[T0]]
- ; GP64-NOT-R6: teq $[[T0]], $zero, 7
- ; GP64-NOT-R6: mflo $2
-
- ; 64R6: ddiv $2, $4, $zero
- ; 64R6: teq $zero, $zero, 7
-
- ; MM32: lw $25, %call16(__divdi3)($2)
-
- ; MM64: ddiv $2, $4, $zero
- ; MM64: teq $zero, $zero, 7
-
- %r = sdiv i64 %a, 0
- ret i64 %r
-}
-
-define signext i128 @sdiv_0_i128(i128 signext %a) {
-entry:
-; ALL-LABEL: sdiv_0_i128:
-
- ; GP32: lw $25, %call16(__divti3)($gp)
-
- ; GP64-NOT-R6: ld $25, %call16(__divti3)($gp)
- ; 64R6: ld $25, %call16(__divti3)($gp)
-
- ; MM32: lw $25, %call16(__divti3)($2)
-
- ; MM64: ld $25, %call16(__divti3)($2)
-
- %r = sdiv i128 %a, 0
- ret i128 %r
-}
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/srem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/srem.ll?rev=266285&r1=266284&r2=266285&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/srem.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/srem.ll Thu Apr 14 04:13:13 2016
@@ -1,38 +1,50 @@
; RUN: llc < %s -march=mips -mcpu=mips2 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=GP32 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
+; RUN: -check-prefix=ALL -check-prefix=GP32 \
+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
; RUN: llc < %s -march=mips -mcpu=mips32 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=GP32 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
-; RUN: llc < %s -march=mips -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefix=GP32 \
-; RUN: -check-prefix=R2-R5 -check-prefix=R2-R6 -check-prefix=NOT-R6
-; RUN: llc < %s -march=mips -mcpu=mips32r3 -relocation-model=pic | FileCheck %s -check-prefix=GP32 \
-; RUN: -check-prefix=R2-R5 -check-prefix=R2-R6 -check-prefix=NOT-R6
-; RUN: llc < %s -march=mips -mcpu=mips32r5 -relocation-model=pic | FileCheck %s -check-prefix=GP32 \
-; RUN: -check-prefix=R2-R5 -check-prefix=R2-R6 -check-prefix=NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=GP32 \
+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
+; RUN: llc < %s -march=mips -mcpu=mips32r2 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefix=ALL -check-prefix=GP32 -check-prefix=R2-R5 \
+; RUN: -check-prefix=R2-R6 -check-prefix=NOT-R6
+; RUN: llc < %s -march=mips -mcpu=mips32r3 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefix=ALL -check-prefix=GP32 -check-prefix=R2-R5 \
+; RUN: -check-prefix=R2-R6 -check-prefix=NOT-R6
+; RUN: llc < %s -march=mips -mcpu=mips32r5 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefix=ALL -check-prefix=GP32 -check-prefix=R2-R5 \
+; RUN: -check-prefix=R2-R6 -check-prefix=NOT-R6
; RUN: llc < %s -march=mips -mcpu=mips32r6 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=GP32 -check-prefix=R6 -check-prefix=R2-R6
+; RUN: -check-prefix=ALL -check-prefix=GP32 \
+; RUN: -check-prefix=R6 -check-prefix=R2-R6
+
; RUN: llc < %s -march=mips64 -mcpu=mips3 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
+; RUN: -check-prefix=ALL -check-prefix=GP64-NOT-R6 \
+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
+; RUN: -check-prefix=ALL -check-prefix=GP64-NOT-R6 \
+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
+; RUN: -check-prefix=ALL -check-prefix=GP64-NOT-R6 \
+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r2 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=R2-R5 -check-prefix=R2-R6 \
-; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=R2-R5 -check-prefix=R2-R6 \
+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r3 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=R2-R5 -check-prefix=R2-R6 \
-; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=R2-R5 -check-prefix=R2-R6 \
+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r5 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=R2-R5 -check-prefix=R2-R6 \
-; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=R2-R5 -check-prefix=R2-R6 \
+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=64R6 -check-prefix=R6 -check-prefix=R2-R6
+; RUN: -check-prefix=ALL -check-prefix=64R6 \
+; RUN: -check-prefix=R6 -check-prefix=R2-R6
+
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=MM -check-prefix=MMR3 -check-prefix=MM32
+; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=MM -check-prefix=MMR6 -check-prefix=MM32
+; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=MM -check-prefix=MMR6 -check-prefix=MM64
+; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define signext i1 @srem_i1(i1 signext %a, i1 signext %b) {
entry:
@@ -179,183 +191,12 @@ entry:
; GP32: lw $25, %call16(__modti3)($gp)
; GP64-NOT-R6: ld $25, %call16(__modti3)($gp)
- ; 64-R6: ld $25, %call16(__modti3)($gp)
-
- ; MM32: lw $25, %call16(__modti3)($2)
-
- ; MM64: ld $25, %call16(__modti3)($2)
-
- %r = srem i128 %a, %b
- ret i128 %r
-}
-
-define signext i1 @srem_0_i1(i1 signext %a) {
-entry:
-; ALL-LABEL: srem_0_i1:
-
- ; NOT-R6: addiu $[[T0:[0-9]+]], $zero, 0
- ; NOT-R6: div $zero, $4, $[[T0]]
- ; NOT-R6: teq $[[T0]], $zero, 7
- ; NOT-R6: mfhi $[[T1:[0-9]+]]
- ; NOT-R6: sll $[[T2:[0-9]+]], $[[T1]], 31
- ; NOT-R6: sra $2, $[[T2]], 31
-
- ; R6: mod $[[T0:[0-9]+]], $4, $zero
- ; R6: teq $zero, $zero, 7
- ; R6: sll $[[T1:[0-9]+]], $[[T0]], 31
- ; R6: sra $2, $[[T1]], 31
-
- ; MMR3: lui $[[T0:[0-9]+]], 0
- ; MMR3: div $zero, $4, $[[T0]]
- ; MMR3: teq $[[T0]], $zero, 7
- ; MMR3: mfhi $[[T1:[0-9]+]]
- ; MMR3: sll $[[T2:[0-9]+]], $[[T1]], 31
- ; MMR3: sra $2, $[[T2]], 31
-
- ; MMR6: lui $[[T0:[0-9]+]], 0
- ; MMR6: mod $[[T1:[0-9]+]], $4, $[[T0]]
- ; MMR6: teq $[[T0]], $zero, 7
- ; MMR6: sll $[[T2:[0-9]+]], $[[T1]], 31
- ; MMR6: sra $2, $[[T2]], 31
-
- %r = srem i1 %a, 0
- ret i1 %r
-}
-
-define signext i8 @srem_0_i8(i8 signext %a) {
-entry:
-; ALL-LABEL: srem_0_i8:
-
- ; NOT-R2-R6: addiu $[[T0:[0-9]+]], $zero, 0
- ; NOT-R2-R6: div $zero, $4, $[[T0]]
- ; NOT-R2-R6: teq $[[T0]], $zero, 7
- ; NOT-R2-R6: mfhi $[[T1:[0-9]+]]
- ; NOT-R2-R6: sll $[[T2:[0-9]+]], $[[T1]], 24
- ; NOT-R2-R6: sra $2, $[[T2]], 24
-
- ; R2-R5: addiu $[[T0:[0-9]+]], $zero, 0
- ; R2-R5: div $zero, $4, $[[T0]]
- ; R2-R5: teq $[[T0]], $zero, 7
- ; R2-R5: mfhi $[[T1:[0-9]+]]
- ; R2-R5: seb $2, $[[T1]]
-
- ; R6: mod $[[T0:[0-9]+]], $4, $zero
- ; R6: teq $zero, $zero, 7
- ; R6: seb $2, $[[T0]]
-
- ; MMR3: lui $[[T0:[0-9]+]], 0
- ; MMR3: div $zero, $4, $[[T0]]
- ; MMR3: teq $[[T0]], $zero, 7
- ; MMR3: mfhi $[[T1:[0-9]+]]
- ; MMR3: seb $2, $[[T1]]
-
- ; MMR6: lui $[[T0:[0-9]+]], 0
- ; MMR6: mod $[[T1:[0-9]+]], $4, $[[T0]]
- ; MMR6: teq $[[T0]], $zero, 7
- ; MMR6: seb $2, $[[T1]]
-
- %r = srem i8 %a, 0
- ret i8 %r
-}
-
-define signext i16 @srem_0_i16(i16 signext %a) {
-entry:
-; ALL-LABEL: srem_0_i16:
-
- ; NOT-R2-R6: addiu $[[T0:[0-9]+]], $zero, 0
- ; NOT-R2-R6: div $zero, $4, $[[T0]]
- ; NOT-R2-R6: teq $[[T0]], $zero, 7
- ; NOT-R2-R6: mfhi $[[T1:[0-9]+]]
- ; NOT-R2-R6: sll $[[T2:[0-9]+]], $[[T1]], 16
- ; NOT-R2-R6: sra $2, $[[T2]], 16
-
- ; R2-R5: addiu $[[T0:[0-9]+]], $zero, 0
- ; R2-R5: div $zero, $4, $[[T0]]
- ; R2-R5: teq $[[T0]], $zero, 7
- ; R2-R5: mfhi $[[T1:[0-9]+]]
- ; R2-R5: seh $2, $[[T1]]
-
- ; R6: mod $[[T0:[0-9]+]], $4, $zero
- ; R6: teq $zero, $zero, 7
- ; R6: seh $2, $[[T0]]
-
- ; MMR3: lui $[[T0:[0-9]+]], 0
- ; MMR3: div $zero, $4, $[[T0]]
- ; MMR3: teq $[[T0]], $zero, 7
- ; MMR3: mfhi $[[T1:[0-9]+]]
- ; MMR3: seh $2, $[[T1]]
-
- ; MMR6: lui $[[T0:[0-9]+]], 0
- ; MMR6: mod $[[T1:[0-9]+]], $4, $[[T0]]
- ; MMR6: teq $[[T0]], $zero, 7
- ; MMR6: seh $2, $[[T1]]
-
- %r = srem i16 %a, 0
- ret i16 %r
-}
-
-
-define signext i32 @srem_0_i32(i32 signext %a) {
-entry:
-; ALL-LABEL: srem_0_i32:
-
- ; NOT-R6: addiu $[[T0:[0-9]+]], $zero, 0
- ; NOT-R6: div $zero, $4, $[[T0]]
- ; NOT-R6: teq $[[T0]], $zero, 7
- ; NOT-R6: mfhi $2
-
- ; R6: mod $2, $4, $zero
- ; R6: teq $zero, $zero, 7
-
- ; MMR3: lui $[[T0:[0-9]+]], 0
- ; MMR3: div $zero, $4, $[[T0]]
- ; MMR3: teq $[[T0]], $zero, 7
- ; MMR3: mfhi $2
-
- ; MMR6: lui $[[T0:[0-9]+]], 0
- ; MMR6: mod $2, $4, $[[T0]]
- ; MMR6: teq $[[T0]], $zero, 7
-
- %r = srem i32 %a, 0
- ret i32 %r
-}
-
-define signext i64 @srem_0_i64(i64 signext %a) {
-entry:
-; ALL-LABEL: srem_0_i64:
-
- ; GP32: lw $25, %call16(__moddi3)($gp)
-
- ; GP64-NOT-R6: daddiu $[[T0:[0-9]+]], $zero, 0
- ; GP64-NOT-R6: ddiv $zero, $4, $[[T0]]
- ; GP64-NOT-R6: teq $[[T0]], $zero, 7
- ; GP64-NOT-R6: mfhi $2
-
- ; 64R6: dmod $2, $4, $zero
- ; 64R6: teq $zero, $zero, 7
-
- ; MM32: lw $25, %call16(__moddi3)($2)
-
- ; MM64: dmod $2, $4, $zero
- ; MM64: teq $zero, $zero, 7
-
- %r = srem i64 %a, 0
- ret i64 %r
-}
-
-define signext i128 @srem_0_i128(i128 signext %a) {
-entry:
-; ALL-LABEL: srem_0_i128:
-
- ; GP32: lw $25, %call16(__modti3)($gp)
-
- ; GP64-NOT-R6: ld $25, %call16(__modti3)($gp)
; 64R6: ld $25, %call16(__modti3)($gp)
; MM32: lw $25, %call16(__modti3)($2)
; MM64: ld $25, %call16(__modti3)($2)
- %r = srem i128 %a, 0
+ %r = srem i128 %a, %b
ret i128 %r
}
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/udiv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/udiv.ll?rev=266285&r1=266284&r2=266285&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/udiv.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/udiv.ll Thu Apr 14 04:13:13 2016
@@ -1,35 +1,37 @@
; RUN: llc < %s -march=mips -mcpu=mips2 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP32
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP32
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32r2 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP32
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32r3 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP32
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32r5 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP32
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 -check-prefix=GP32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=R6 -check-prefix=GP32
+; RUN: -check-prefix=ALL -check-prefix=R6 -check-prefix=GP32
+
; RUN: llc < %s -march=mips64 -mcpu=mips3 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r2 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r3 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r5 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=NOT-R6 -check-prefix=GP64-NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=R6 -check-prefix=64R6
+; RUN: -check-prefix=ALL -check-prefix=R6 -check-prefix=64R6
+
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=MM -check-prefix=MMR3 -check-prefix=MM32
+; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=MM -check-prefix=MMR6 -check-prefix=MM32
+; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=MM -check-prefix=MMR6 -check-prefix=MM64
+; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define zeroext i1 @udiv_i1(i1 zeroext %a, i1 zeroext %b) {
entry:
Modified: llvm/trunk/test/CodeGen/Mips/llvm-ir/urem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/llvm-ir/urem.ll?rev=266285&r1=266284&r2=266285&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/llvm-ir/urem.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/llvm-ir/urem.ll Thu Apr 14 04:13:13 2016
@@ -1,38 +1,50 @@
; RUN: llc < %s -march=mips -mcpu=mips2 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=GP32 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
+; RUN: -check-prefix=ALL -check-prefix=GP32 \
+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
; RUN: llc < %s -march=mips -mcpu=mips32 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=GP32 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
-; RUN: llc < %s -march=mips -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefix=GP32 \
-; RUN: -check-prefix=R2-R5 -check-prefix=R2-R6 -check-prefix=NOT-R6
-; RUN: llc < %s -march=mips -mcpu=mips32r3 -relocation-model=pic | FileCheck %s -check-prefix=GP32 \
-; RUN: -check-prefix=R2-R5 -check-prefix=R2-R6 -check-prefix=NOT-R6
-; RUN: llc < %s -march=mips -mcpu=mips32r5 -relocation-model=pic | FileCheck %s -check-prefix=GP32 \
-; RUN: -check-prefix=R2-R5 -check-prefix=R2-R6 -check-prefix=NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=GP32 \
+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
+; RUN: llc < %s -march=mips -mcpu=mips32r2 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefix=ALL -check-prefix=GP32 -check-prefix=R2-R5 \
+; RUN: -check-prefix=R2-R6 -check-prefix=NOT-R6
+; RUN: llc < %s -march=mips -mcpu=mips32r3 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefix=ALL -check-prefix=GP32 -check-prefix=R2-R5 \
+; RUN: -check-prefix=R2-R6 -check-prefix=NOT-R6
+; RUN: llc < %s -march=mips -mcpu=mips32r5 -relocation-model=pic | FileCheck %s \
+; RUN: -check-prefix=ALL -check-prefix=GP32 -check-prefix=R2-R5 \
+; RUN: -check-prefix=R2-R6 -check-prefix=NOT-R6
; RUN: llc < %s -march=mips -mcpu=mips32r6 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=GP32 -check-prefix=R6 -check-prefix=R2-R6
+; RUN: -check-prefix=ALL -check-prefix=GP32 \
+; RUN: -check-prefix=R6 -check-prefix=R2-R6
+
; RUN: llc < %s -march=mips64 -mcpu=mips3 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
+; RUN: -check-prefix=ALL -check-prefix=GP64-NOT-R6 \
+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
; RUN: llc < %s -march=mips64 -mcpu=mips4 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
+; RUN: -check-prefix=ALL -check-prefix=GP64-NOT-R6 \
+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
+; RUN: -check-prefix=ALL -check-prefix=GP64-NOT-R6 \
+; RUN: -check-prefix=NOT-R6 -check-prefix=NOT-R2-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r2 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=R2-R5 -check-prefix=R2-R6 \
-; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=R2-R5 -check-prefix=R2-R6 \
+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r3 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=R2-R5 -check-prefix=R2-R6 \
-; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=R2-R5 -check-prefix=R2-R6 \
+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r5 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=R2-R5 -check-prefix=R2-R6 \
-; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6
+; RUN: -check-prefix=ALL -check-prefix=R2-R5 -check-prefix=R2-R6 \
+; RUN: -check-prefix=GP64-NOT-R6 -check-prefix=NOT-R6
; RUN: llc < %s -march=mips64 -mcpu=mips64r6 -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=64R6 -check-prefix=R6 -check-prefix=R2-R6
+; RUN: -check-prefix=ALL -check-prefix=64R6 \
+; RUN: -check-prefix=R6 -check-prefix=R2-R6
+
; RUN: llc < %s -march=mips -mcpu=mips32r3 -mattr=+micromips -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=MM -check-prefix=MMR3 -check-prefix=MM32
+; RUN: -check-prefix=ALL -check-prefix=MMR3 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips32r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=MM -check-prefix=MMR6 -check-prefix=MM32
+; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM32
; RUN: llc < %s -march=mips -mcpu=mips64r6 -mattr=+micromips -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefix=MM -check-prefix=MMR6 -check-prefix=MM64
+; RUN: -check-prefix=ALL -check-prefix=MMR6 -check-prefix=MM64
define signext i1 @urem_i1(i1 signext %a, i1 signext %b) {
entry:
@@ -207,7 +219,7 @@ entry:
; GP32: lw $25, %call16(__umodti3)($gp)
; GP64-NOT-R6: ld $25, %call16(__umodti3)($gp)
- ; 64-R6: ld $25, %call16(__umodti3)($gp)
+ ; 64R6: ld $25, %call16(__umodti3)($gp)
; MM32: lw $25, %call16(__umodti3)($2)
More information about the llvm-commits
mailing list