[PATCH] D19091: AMDGPU: Run SIFoldOperands after PeepholeOptimizer

[Matt Arsenault via llvm-commits]

arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added a subscriber: arsenm.

PeepholeOptimizer cleans up redundant copies, which makes
the operand folding more effective.
    
shader-db stats:
    
    Totals:
    SGPRS: 34200 -> 34336 (0.40 %)
    VGPRS: 22118 -> 21655 (-2.09 %)
    Code Size: 632144 -> 633460 (0.21 %) bytes
    LDS: 11 -> 11 (0.00 %) blocks
    Scratch: 10240 -> 11264 (10.00 %) bytes per wave
    Max Waves: 8822 -> 8918 (1.09 %)
    Wait states: 0 -> 0 (0.00 %)
    
    Totals from affected shaders:
    SGPRS: 7704 -> 7840 (1.77 %)
    VGPRS: 5169 -> 4706 (-8.96 %)
    Code Size: 234444 -> 235760 (0.56 %) bytes
    LDS: 2 -> 2 (0.00 %) blocks
    Scratch: 0 -> 1024 (0.00 %) bytes per wave
    Max Waves: 1188 -> 1284 (8.08 %)
    Wait states: 0 -> 0 (0.00 %)
    
    Increases:
    SGPRS: 35 (0.01 %)
    VGPRS: 1 (0.00 %)
    Code Size: 59 (0.02 %)
    LDS: 0 (0.00 %)
    Scratch: 1 (0.00 %)
    Max Waves: 48 (0.02 %)
    Wait states: 0 (0.00 %)
    
    Decreases:
    SGPRS: 26 (0.01 %)
    VGPRS: 54 (0.02 %)
    Code Size: 68 (0.03 %)
    LDS: 0 (0.00 %)
    Scratch: 0 (0.00 %)
    Max Waves: 4 (0.00 %)
    Wait states: 0 (0.00 %)

http://reviews.llvm.org/D19091

Files:
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  test/CodeGen/AMDGPU/commute_modifiers.ll
  test/CodeGen/AMDGPU/fma.ll
  test/CodeGen/AMDGPU/fmed3.ll
  test/CodeGen/AMDGPU/fneg.f64.ll
  test/CodeGen/AMDGPU/fsub64.ll
  test/CodeGen/AMDGPU/imm.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
  test/CodeGen/AMDGPU/madmk.ll
  test/CodeGen/AMDGPU/mul.ll
  test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
  test/CodeGen/AMDGPU/sint_to_fp.f64.ll
  test/CodeGen/AMDGPU/sra.ll
  test/CodeGen/AMDGPU/uint_to_fp.f64.ll
  test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
  test/CodeGen/AMDGPU/v_mac.ll

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