[PATCH] D18869: AArch64: Use a callee save registers for swiftself parameters

[Matthias Braun via llvm-commits]

MatzeB marked 7 inline comments as done.
MatzeB added a comment.

Thanks for the review.


================
Comment at: test/CodeGen/AArch64/swiftself.ll:40
@@ +39,3 @@
+; OPT: ret
+define void @swiftself_passthrough(i8* swiftself %addr0) {
+  call i8 *@swiftself_param(i8* swiftself %addr0)
----------------
qcolombet wrote:
> Is it intended that we just check the label for O0?
The label is always checked.
The rest of the check makes sure that we can indeed create code with no additional mov instructions for the paramaters, -O0 codegen just doesn't optimize enough for it and is left out.

================
Comment at: test/CodeGen/AArch64/swiftself.ll:49
@@ +48,3 @@
+; OPT: b {{_?}}swiftself_param
+; OPT-NOT: ret
+define i8* @swiftself_tail(i8* swiftself %addr0) {
----------------
qcolombet wrote:
> Ditto.
Ditto (only the optimized codegen performs tail call opts which we want to test for).


Repository:
  rL LLVM

http://reviews.llvm.org/D18869