[PATCH] D18902: X86: Use a callee save register for the swiftself parameter.

[Quentin Colombet via llvm-commits]

qcolombet accepted this revision.
qcolombet added a comment.
This revision is now accepted and ready to land.

Hi Matthias,

LGTM with nits.

If you find a way to make the code that you added available for all targets that would be great. I am guessing all the targets will need to do the same checks.

No need to address that in that patch.

Cheers,
-Quentin


================
Comment at: lib/Target/X86/X86ISelLowering.cpp:3859
@@ +3858,3 @@
+      unsigned Reg = ArgLoc.getLocReg();
+      if (!MachineOperand::clobbersPhysReg(CallerPreserved, Reg)) {
+	// Check that we pass the value used for the caller.
----------------
Invert the condition and continue (LLVM coding style).

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:3861
@@ +3860,3 @@
+	// Check that we pass the value used for the caller.
+	SDValue Value = OutVals[I];
+	if (Value->getOpcode() != ISD::CopyFromReg)
----------------
Maybe add an example that uses the variables defined here.
E.g.,
foo:
ArgReg = COPY Reg ; Foo needs to preserve Reg.
Reg = def ; Make sure def is a copy of ArgReg.
call tailcallCandidate



================
Comment at: lib/Target/X86/X86ISelLowering.cpp:3865
@@ +3864,3 @@
+	unsigned ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg();
+	const MachineRegisterInfo &MRI = MF.getRegInfo();
+	if (MRI.getLiveInPhysReg(ArgReg) != Reg)
----------------
tabs :)

================
Comment at: lib/Target/X86/X86ISelLowering.cpp:3869
@@ -3850,1 +3868,3 @@
+      }
+    }
   }
----------------
Is there a way to have this check somewhere in the generic part? Maybe even just available as a utility function somewhere?
 
I am guessing that all targets would need to do something similar if they pass argument in a callee saved register.


Repository:
  rL LLVM

http://reviews.llvm.org/D18902