[PATCH] D18941: Use the correct scratch wave offset register for shaders.

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 12 15:11:01 PDT 2016


arsenm added inline comments.

================
Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:705-718
@@ -694,2 +704,16 @@
 
+  // These must be enabled for compute kernels and disabled for shaders
+  assert(AMDGPU::isShader(CallConv) != Info->hasWorkGroupIDX());
+  assert(AMDGPU::isShader(CallConv) != Info->hasWorkItemIDX());
+
+  assert(!AMDGPU::isShader(CallConv) || !Info->hasPrivateSegmentBuffer());
+  assert(!AMDGPU::isShader(CallConv) || !Info->hasDispatchPtr());
+  assert(!AMDGPU::isShader(CallConv) || !Info->hasKernargSegmentPtr());
+  assert(!AMDGPU::isShader(CallConv) || !Info->hasFlatScratchInit());
+  assert(!AMDGPU::isShader(CallConv) || !Info->hasWorkGroupIDY());
+  assert(!AMDGPU::isShader(CallConv) || !Info->hasWorkGroupIDZ());
+  assert(!AMDGPU::isShader(CallConv) || !Info->hasWorkGroupInfo());
+  assert(!AMDGPU::isShader(CallConv) || !Info->hasWorkItemIDY());
+  assert(!AMDGPU::isShader(CallConv) || !Info->hasWorkItemIDZ());
+
   // FIXME: How should these inputs interact with inreg / custom SGPR inputs?
----------------
You should avoid having the isShader repeated all of these times, and the others should all be in the same assert. Maybe move under the isShader above?


http://reviews.llvm.org/D18941





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