[PATCH] D18916: AMDGPU/SI: Fix regclass for the pseudo sgpr spill instructions

[Matt Arsenault via llvm-commits]

arsenm added inline comments.

================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:593
@@ +592,3 @@
+
+    // The SGPR spill/restore instructions only work on number sgprs, so
+    // we need to make srue we are using the correct register class.
----------------
"number sgprs" sounds confusing. How about non-special SGPRs or something like that

================
Comment at: lib/Target/AMDGPU/SIInstrInfo.cpp:687
@@ +686,3 @@
+    // we need to make srue we are using the correct register class.
+    if(TargetRegisterInfo::isVirtualRegister(DestReg))
+      MRI.constrainRegClass(DestReg, RI.getRegClass(OpDesc.OpInfo[0].RegClass));
----------------
Missing space aster if

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Comment at: test/CodeGen/AMDGPU/sgpr-spill-regclass.ll:8
@@ +7,3 @@
+; Function Attrs: nounwind uwtable
+define spir_kernel void @hoge(float addrspace(1)* nocapture readonly %arg, float addrspace(1)* %arg1, float %arg2) #0 align 2 {
+bb:
----------------
Don't need spir_kernel or align 2

================
Comment at: test/CodeGen/AMDGPU/sgpr-spill-regclass.ll:466
@@ +465,3 @@
+
+attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="fiji" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { nounwind readnone }
----------------
Thee string attributes can be removed


http://reviews.llvm.org/D18916