[PATCH] D18548: [Mips] add assembler support for .set arch=octeon

Strahinja Petrovic via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 11 08:56:22 PDT 2016


spetrovic updated this revision to Diff 53234.
spetrovic marked 3 inline comments as done.
spetrovic added a comment.
Herald added a subscriber: sdardis.

Comments addressed.


Repository:
  rL LLVM

http://reviews.llvm.org/D18548

Files:
  lib/Target/Mips/AsmParser/MipsAsmParser.cpp
  test/MC/Mips/set-arch.s

Index: test/MC/Mips/set-arch.s
===================================================================
--- test/MC/Mips/set-arch.s
+++ test/MC/Mips/set-arch.s
@@ -36,7 +36,8 @@
     drotr32     $1, $14, 15
     .set arch=mips64r6
     mod         $2, $4, $6
-    .set arch=cnmips
+    .set arch=octeon
+    baddu $9, $6, $7
     .set arch=r4000
     dadd        $2, $2, $2
 
@@ -62,6 +63,7 @@
 # CHECK: drotr32     $1, $14, 15
 # CHECK: .set arch=mips64r6
 # CHECK: mod         $2, $4, $6
-# CHECK: .set arch=cnmips
+# CHECK: .set arch=octeon
+# CHECK: baddu $9, $6, $7
 # CHECK: .set arch=r4000
 # CHECK: dadd        $2, $2, $2
Index: lib/Target/Mips/AsmParser/MipsAsmParser.cpp
===================================================================
--- lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -5295,7 +5295,7 @@
           .Case("mips64r3", "mips64r3")
           .Case("mips64r5", "mips64r5")
           .Case("mips64r6", "mips64r6")
-          .Case("cnmips", "cnmips")
+          .Case("octeon", "cnmips")
           .Case("r4000", "mips3") // This is an implementation of Mips3.
           .Default("");
 


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D18548.53234.patch
Type: text/x-patch
Size: 1160 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160411/52aff982/attachment.bin>


More information about the llvm-commits mailing list