[llvm] r265924 - [X86] Restrict max long nop length for Lakemont.

[Andrey Turetskiy via llvm-commits]

Author: aturetsk
Date: Mon Apr 11 05:07:36 2016
New Revision: 265924

URL: http://llvm.org/viewvc/llvm-project?rev=265924&view=rev
Log:
[X86] Restrict max long nop length for Lakemont.

Restrict the max length of long nops for Lakemont to 7. Experiments on MCU
benchmarks (Dhrystone, Coremark) show that this is the most optimal length.

Differential Revision: http://reviews.llvm.org/D18897


Modified:
    llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
    llvm/trunk/test/MC/X86/x86_long_nop.s

Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp?rev=265924&r1=265923&r2=265924&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp (original)
+++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp Mon Apr 11 05:07:36 2016
@@ -72,7 +72,8 @@ class X86AsmBackend : public MCAsmBacken
   const uint64_t MaxNopLength;
 public:
   X86AsmBackend(const Target &T, StringRef CPU)
-      : MCAsmBackend(), CPU(CPU), MaxNopLength(CPU == "slm" ? 7 : 15) {
+      : MCAsmBackend(), CPU(CPU),
+        MaxNopLength((CPU == "slm" || CPU == "lakemont") ? 7 : 15) {
     HasNopl = CPU != "generic" && CPU != "i386" && CPU != "i486" &&
               CPU != "i586" && CPU != "pentium" && CPU != "pentium-mmx" &&
               CPU != "i686" && CPU != "k6" && CPU != "k6-2" && CPU != "k6-3" &&

Modified: llvm/trunk/test/MC/X86/x86_long_nop.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/x86_long_nop.s?rev=265924&r1=265923&r2=265924&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/x86_long_nop.s (original)
+++ llvm/trunk/test/MC/X86/x86_long_nop.s Mon Apr 11 05:07:36 2016
@@ -2,7 +2,8 @@
 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s
 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=x86_64-apple-darwin10.0 %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s
 # RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-apple-darwin8 %s | llvm-objdump -d -no-show-raw-insn - | FileCheck %s
-# RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu -mcpu=slm %s | llvm-objdump -d -no-show-raw-insn - | FileCheck --check-prefix=SLM %s
+# RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu -mcpu=slm %s | llvm-objdump -d -no-show-raw-insn - | FileCheck --check-prefix=LNOP7 %s
+# RUN: llvm-mc -filetype=obj -arch=x86 -triple=i686-pc-linux-gnu -mcpu=lakemont %s | llvm-objdump -d -no-show-raw-insn - | FileCheck --check-prefix=LNOP7 %s
 
 # Ensure alignment directives also emit sequences of 15-byte NOPs on processors
 # capable of using long NOPs.
@@ -15,11 +16,12 @@ inc %eax
 # CHECK-NEXT: 1f:  nop
 # CHECK-NEXT: 20:  inc
 
-# On Silvermont we emit only 7 byte NOPs since longer NOPs are not profitable
-# SLM: 0:  inc
-# SLM-NEXT: 1:  nop
-# SLM-NEXT: 8:  nop
-# SLM-NEXT: f:  nop
-# SLM-NEXT: 16:  nop
-# SLM-NEXT: 1d:  nop
-# SLM-NEXT: 20:  inc
+# On Silvermont and Lakemont we emit only 7 byte NOPs since longer NOPs
+# are not profitable.
+# LNOP7: 0:  inc
+# LNOP7-NEXT: 1:  nop
+# LNOP7-NEXT: 8:  nop
+# LNOP7-NEXT: f:  nop
+# LNOP7-NEXT: 16:  nop
+# LNOP7-NEXT: 1d:  nop
+# LNOP7-NEXT: 20:  inc