[llvm] r265769 - [AMDGPU] Add some VI disassembler tests missing from previous autogeneration due to different filecheck prefix. NFC.

[Valery Pykhtin via llvm-commits]

Author: vpykhtin
Date: Fri Apr  8 00:42:20 2016
New Revision: 265769

URL: http://llvm.org/viewvc/llvm-project?rev=265769&view=rev
Log:
[AMDGPU] Add some VI disassembler tests missing from previous autogeneration due to different filecheck prefix. NFC.

Modified:
    llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt

Modified: llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt?rev=265769&r1=265768&r2=265769&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt (original)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt Fri Apr  8 00:42:20 2016
@@ -1,11 +1,77 @@
 # RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
 
+# VI: v_mov_b32_e32 v1, v2 ; encoding: [0x02,0x03,0x02,0x7e]
+0x02 0x03 0x02 0x7e
+
+# VI: v_nop ; encoding: [0x00,0x00,0x00,0x7e]
+0x00 0x00 0x00 0x7e
+
 # VI:   v_clrexcp ; encoding: [0x00,0x6a,0x00,0x7e]
 0x00 0x6a 0x00 0x7e
 
+# VI: v_nop ; encoding: [0x00,0x00,0x00,0x7e]
+0x00 0x00 0x00 0x7e
+
+# VI: v_mov_b32_e32 v1, v2 ; encoding: [0x02,0x03,0x02,0x7e]
+0x02 0x03 0x02 0x7e
+
 # VI: v_readfirstlane_b32 s1, v2 ; encoding: [0x02,0x05,0x02,0x7e]
 0x02 0x05 0x02 0x7e
 
+# VI: v_cvt_i32_f64_e32 v1, v[2:3] ; encoding: [0x02,0x07,0x02,0x7e]
+0x02 0x07 0x02 0x7e
+
+# VI: v_cvt_f64_i32_e32 v[1:2], v2 ; encoding: [0x02,0x09,0x02,0x7e]
+0x02 0x09 0x02 0x7e
+
+# VI: v_cvt_f32_i32_e32 v1, v2 ; encoding: [0x02,0x0b,0x02,0x7e]
+0x02 0x0b 0x02 0x7e
+
+# VI: v_cvt_f32_u32_e32 v1, v2 ; encoding: [0x02,0x0d,0x02,0x7e]
+0x02 0x0d 0x02 0x7e
+
+# VI: v_cvt_i32_f32_e32 v1, v2 ; encoding: [0x02,0x11,0x02,0x7e]
+0x02 0x11 0x02 0x7e
+
+# VI: v_cvt_f16_f32_e32 v1, v2 ; encoding: [0x02,0x15,0x02,0x7e]
+0x02 0x15 0x02 0x7e
+
+# VI: v_cvt_f32_f16_e32 v1, v2 ; encoding: [0x02,0x17,0x02,0x7e]
+0x02 0x17 0x02 0x7e
+
+# VI: v_cvt_rpi_i32_f32_e32 v1, v2 ; encoding: [0x02,0x19,0x02,0x7e]
+0x02 0x19 0x02 0x7e
+
+# VI: v_cvt_flr_i32_f32_e32 v1, v2 ; encoding: [0x02,0x1b,0x02,0x7e]
+0x02 0x1b 0x02 0x7e
+
+# VI: v_cvt_off_f32_i4_e32 v1, v2 ; encoding: [0x02,0x1d,0x02,0x7e]
+0x02 0x1d 0x02 0x7e
+
+# VI: v_cvt_f32_f64_e32 v1, v[2:3] ; encoding: [0x02,0x1f,0x02,0x7e]
+0x02 0x1f 0x02 0x7e
+
+# VI: v_cvt_f64_f32_e32 v[1:2], v2 ; encoding: [0x02,0x21,0x02,0x7e]
+0x02 0x21 0x02 0x7e
+
+# VI: v_cvt_f32_ubyte0_e32 v1, v2 ; encoding: [0x02,0x23,0x02,0x7e]
+0x02 0x23 0x02 0x7e
+
+# VI: v_cvt_f32_ubyte1_e32 v1, v2 ; encoding: [0x02,0x25,0x02,0x7e]
+0x02 0x25 0x02 0x7e
+
+# VI: v_cvt_f32_ubyte2_e32 v1, v2 ; encoding: [0x02,0x27,0x02,0x7e]
+0x02 0x27 0x02 0x7e
+
+# VI: v_cvt_f32_ubyte3_e32 v1, v2 ; encoding: [0x02,0x29,0x02,0x7e]
+0x02 0x29 0x02 0x7e
+
+# VI: v_cvt_u32_f64_e32 v1, v[2:3] ; encoding: [0x02,0x2b,0x02,0x7e]
+0x02 0x2b 0x02 0x7e
+
+# VI: v_cvt_f64_u32_e32 v[1:2], v2 ; encoding: [0x02,0x2d,0x02,0x7e]
+0x02 0x2d 0x02 0x7e
+
 # VI:   v_fract_f32_e32 v1, v2 ; encoding: [0x02,0x37,0x02,0x7e]
 0x02 0x37 0x02 0x7e