[PATCH] D18864: [SystemZ] Support conditional sibling calls via BRCL.

[Marcin Kościelnicki via llvm-commits]

koriakin added a comment.

This is the third patch for issue #23417 - direct conditional sibling calls.  Compare and branch instructions are of no use here, as they have limitted reach.  This is not as useful as I hoped, as it usually only triggers for calls without parameters - eg. for f3 in the attached test, IfCvt bails on the llhi instruction loading the parameter, even after I make all the IsIfCvt*Profitable functions always return true.

I'll also submit a 4th patch for indirect conditional sibling calls, but these are even more limitted, since the transformation only triggers if the function to call is already in %r1 (otherwise, the unpredicable load disturbs IfCvt).  I was also considering adding a plain BCR instruction as a predicated variant of BR for switches, but since switches always (?) have the address arithmetic instructions between value-in-range check and indirect jump, it'd be rather useless.


Repository:
  rL LLVM

http://reviews.llvm.org/D18864