[llvm] r265511 - RegisterScavenger: Take a reference as enterBasicBlock() argument.
Matthias Braun via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 5 19:47:12 PDT 2016
Author: matze
Date: Tue Apr 5 21:47:09 2016
New Revision: 265511
URL: http://llvm.org/viewvc/llvm-project?rev=265511&view=rev
Log:
RegisterScavenger: Take a reference as enterBasicBlock() argument.
Make it obvious that the argument cannot be nullptr.
Remove an unnecessary nullptr check in initRegState.
Modified:
llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h
llvm/trunk/lib/CodeGen/BranchFolding.cpp
llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
llvm/trunk/lib/CodeGen/TailDuplication.cpp
llvm/trunk/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp
llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp
llvm/trunk/lib/Target/WebAssembly/WebAssemblyPEI.cpp
Modified: llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h?rev=265511&r1=265510&r2=265511&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h (original)
+++ llvm/trunk/include/llvm/CodeGen/RegisterScavenging.h Tue Apr 5 21:47:09 2016
@@ -71,8 +71,8 @@ public:
RegScavenger()
: MBB(nullptr), NumRegUnits(0), Tracking(false) {}
- /// Start tracking liveness from the begin of the specific basic block.
- void enterBasicBlock(MachineBasicBlock *mbb);
+ /// Start tracking liveness from the begin of basic block \p MBB.
+ void enterBasicBlock(MachineBasicBlock &MBB);
/// Move the internal MBB iterator and update register states.
void forward();
Modified: llvm/trunk/lib/CodeGen/BranchFolding.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BranchFolding.cpp?rev=265511&r1=265510&r2=265511&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/BranchFolding.cpp (original)
+++ llvm/trunk/lib/CodeGen/BranchFolding.cpp Tue Apr 5 21:47:09 2016
@@ -397,7 +397,7 @@ static unsigned ComputeCommonTailLength(
void BranchFolder::MaintainLiveIns(MachineBasicBlock *CurMBB,
MachineBasicBlock *NewMBB) {
if (RS) {
- RS->enterBasicBlock(CurMBB);
+ RS->enterBasicBlock(*CurMBB);
if (!CurMBB->empty())
RS->forward(std::prev(CurMBB->end()));
for (unsigned int i = 1, e = TRI->getNumRegs(); i != e; i++)
Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=265511&r1=265510&r2=265511&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original)
+++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Tue Apr 5 21:47:09 2016
@@ -880,7 +880,7 @@ void PEI::replaceFrameIndices(MachineBas
unsigned FrameSetupOpcode = TII.getCallFrameSetupOpcode();
unsigned FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
- if (RS && !FrameIndexVirtualScavenging) RS->enterBasicBlock(BB);
+ if (RS && !FrameIndexVirtualScavenging) RS->enterBasicBlock(*BB);
bool InsideCallSequence = false;
@@ -991,7 +991,7 @@ PEI::scavengeFrameVirtualRegs(MachineFun
// Run through the instructions and find any virtual registers.
for (MachineFunction::iterator BB = Fn.begin(),
E = Fn.end(); BB != E; ++BB) {
- RS->enterBasicBlock(&*BB);
+ RS->enterBasicBlock(*BB);
int SPAdj = 0;
Modified: llvm/trunk/lib/CodeGen/RegisterScavenging.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterScavenging.cpp?rev=265511&r1=265510&r2=265511&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterScavenging.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterScavenging.cpp Tue Apr 5 21:47:09 2016
@@ -49,9 +49,6 @@ void RegScavenger::initRegState() {
// All register units start out unused.
RegUnitsAvailable.set();
- if (!MBB)
- return;
-
// Live-in registers are in use.
for (const auto &LI : MBB->liveins())
setRegUsed(LI.PhysReg, LI.LaneMask);
@@ -63,8 +60,8 @@ void RegScavenger::initRegState() {
setRegUsed(I);
}
-void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
- MachineFunction &MF = *mbb->getParent();
+void RegScavenger::enterBasicBlock(MachineBasicBlock &MBB) {
+ MachineFunction &MF = *MBB.getParent();
TII = MF.getSubtarget().getInstrInfo();
TRI = MF.getSubtarget().getRegisterInfo();
MRI = &MF.getRegInfo();
@@ -78,15 +75,15 @@ void RegScavenger::enterBasicBlock(Machi
"Cannot use register scavenger with inaccurate liveness");
// Self-initialize.
- if (!MBB) {
+ if (!this->MBB) {
NumRegUnits = TRI->getNumRegUnits();
RegUnitsAvailable.resize(NumRegUnits);
KillRegUnits.resize(NumRegUnits);
DefRegUnits.resize(NumRegUnits);
TmpRegUnits.resize(NumRegUnits);
}
+ this->MBB = &MBB;
- MBB = mbb;
initRegState();
Tracking = false;
Modified: llvm/trunk/lib/CodeGen/TailDuplication.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TailDuplication.cpp?rev=265511&r1=265510&r2=265511&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TailDuplication.cpp (original)
+++ llvm/trunk/lib/CodeGen/TailDuplication.cpp Tue Apr 5 21:47:09 2016
@@ -816,7 +816,7 @@ TailDuplicatePass::TailDuplicate(Machine
if (RS && !TailBB->livein_empty()) {
// Update PredBB livein.
- RS->enterBasicBlock(PredBB);
+ RS->enterBasicBlock(*PredBB);
if (!PredBB->empty())
RS->forward(std::prev(PredBB->end()));
for (const auto &LI : TailBB->liveins()) {
Modified: llvm/trunk/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp?rev=265511&r1=265510&r2=265511&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp Tue Apr 5 21:47:09 2016
@@ -497,7 +497,7 @@ bool AArch64A57FPLoadBalancing::colorCha
int AArch64A57FPLoadBalancing::scavengeRegister(Chain *G, Color C,
MachineBasicBlock &MBB) {
RegScavenger RS;
- RS.enterBasicBlock(&MBB);
+ RS.enterBasicBlock(MBB);
RS.forward(MachineBasicBlock::iterator(G->getStart()));
// Can we find an appropriate register that is available throughout the life
Modified: llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp?rev=265511&r1=265510&r2=265511&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp Tue Apr 5 21:47:09 2016
@@ -744,7 +744,7 @@ unsigned SIInstrInfo::calculateLDSSpillA
Entry.addLiveIn(Reg);
}
- RS->enterBasicBlock(&Entry);
+ RS->enterBasicBlock(Entry);
// FIXME: Can we scavenge an SReg_64 and access the subregs?
unsigned STmp0 = RS->scavengeRegister(&AMDGPU::SGPR_32RegClass, 0);
unsigned STmp1 = RS->scavengeRegister(&AMDGPU::SGPR_32RegClass, 0);
Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp?rev=265511&r1=265510&r2=265511&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp Tue Apr 5 21:47:09 2016
@@ -326,7 +326,7 @@ unsigned Mips16InstrInfo::loadImmediate(
int Reg =0;
int SpReg = 0;
- rs.enterBasicBlock(&MBB);
+ rs.enterBasicBlock(MBB);
rs.forward(II);
//
// We need to know which registers can be used, in the case where there
Modified: llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp?rev=265511&r1=265510&r2=265511&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCFrameLowering.cpp Tue Apr 5 21:47:09 2016
@@ -596,7 +596,7 @@ PPCFrameLowering::findScratchRegister(Ma
(!UseAtEnd && (&MBB->getParent()->front() == MBB)))
return true;
- RS.enterBasicBlock(MBB);
+ RS.enterBasicBlock(*MBB);
if (UseAtEnd && !MBB->empty()) {
// The scratch register will be used at the end of the block, so must
Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyPEI.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyPEI.cpp?rev=265511&r1=265510&r2=265511&view=diff
==============================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyPEI.cpp (original)
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyPEI.cpp Tue Apr 5 21:47:09 2016
@@ -867,7 +867,7 @@ void WasmPEI::replaceFrameIndices(Machin
unsigned FrameSetupOpcode = TII.getCallFrameSetupOpcode();
unsigned FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
- if (RS && !FrameIndexVirtualScavenging) RS->enterBasicBlock(BB);
+ if (RS && !FrameIndexVirtualScavenging) RS->enterBasicBlock(*BB);
bool InsideCallSequence = false;
@@ -977,7 +977,7 @@ WasmPEI::scavengeFrameVirtualRegs(Machin
// Run through the instructions and find any virtual registers.
for (MachineFunction::iterator BB = Fn.begin(),
E = Fn.end(); BB != E; ++BB) {
- RS->enterBasicBlock(&*BB);
+ RS->enterBasicBlock(*BB);
int SPAdj = 0;
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