[PATCH] D18770: Change llvm-objdump to default to print hex immediates by default

[Colin LeMahieu via llvm-commits]

colinl created this revision.
colinl added reviewers: sidneym, khemant, enderby, davide, majnemer, dblaikie.
colinl added a subscriber: llvm-commits.
colinl set the repository for this revision to rL LLVM.
Herald added subscribers: dsanders, jfb.

I think by default people disassembling want to view hex immediates rather than decimal.

This patch changes this default and in order to minimize test changes, we add --print-imm-hex=false to any lit tests with llvm-objdump that are written for non-hex immediates.

Repository:
  rL LLVM

http://reviews.llvm.org/D18770

Files:
  test/CodeGen/ARM/inlineasm-switch-mode-oneway-from-thumb.ll
  test/CodeGen/ARM/inlineasm-switch-mode.ll
  test/CodeGen/ARM/struct_byval_arm_t1_t2.ll
  test/CodeGen/ARM/thumb1-varalloc.ll
  test/CodeGen/Hexagon/cmp.ll
  test/CodeGen/Hexagon/relax.ll
  test/CodeGen/Mips/micromips-atomic1.ll
  test/CodeGen/Thumb/large-stack.ll
  test/MC/ARM/coff-relocations.s
  test/MC/ARM/thumb1-relax-bcc.s
  test/MC/ARM/thumb1-relax-br.s
  test/MC/ARM/thumb2-cbn-to-next-inst.s
  test/MC/Disassembler/ARM/hex-immediates.txt
  test/MC/Disassembler/X86/hex-immediates.txt
  test/MC/Disassembler/X86/moffs.txt
  test/MC/ELF/relax-arith.s
  test/MC/ELF/relax-arith2.s
  test/MC/ELF/relax-arith3.s
  test/MC/ELF/relax-arith4.s
  test/MC/Hexagon/asmMap.s
  test/MC/Hexagon/duplex-registers.s
  test/MC/Hexagon/fixups.s
  test/MC/Hexagon/iconst.s
  test/MC/Hexagon/inst_cmp_eqi.ll
  test/MC/Hexagon/inst_cmp_gti.ll
  test/MC/Hexagon/inst_cmp_ugti.ll
  test/MC/Hexagon/relaxed_newvalue.s
  test/MC/Hexagon/two_ext.s
  test/MC/Hexagon/v60-vmem.s
  test/MC/Mips/cprestore-noreorder.s
  test/MC/Mips/cprestore-reorder.s
  test/MC/Mips/cpsetup.s
  test/MC/Mips/got-rel-expr.s
  test/MC/Mips/hex-immediates.s
  test/MC/Mips/higher-highest-addressing.s
  test/MC/Mips/hilo-addressing.s
  test/MC/Mips/instr-analysis.s
  test/MC/Mips/micromips-el-fixup-data.s
  test/MC/Mips/mips64extins.ll
  test/MC/Mips/mips64shift.ll
  test/MC/Mips/mips_gprel16.s
  test/MC/Mips/nacl-mask.s
  test/MC/X86/AlignedBundling/labeloffset.s
  test/MC/X86/AlignedBundling/misaligned-bundle-group.s
  test/MC/X86/AlignedBundling/misaligned-bundle.s
  test/MC/X86/AlignedBundling/rodata-section.s
  test/MC/X86/AlignedBundling/single-inst-bundling.s
  test/MC/X86/fixup-cpu-mode.s
  test/MC/X86/hex-immediates.s
  test/Object/Mips/feature.test
  test/Object/Mips/objdump-micro-mips.test
  test/Object/X86/objdump-disassembly-inline-relocations.test
  test/Object/X86/objdump-trivial-object.test
  test/tools/llvm-objdump/AArch64/macho-symbolized-disassembly.test
  test/tools/llvm-objdump/ARM/macho-symbolized-disassembly.test
  test/tools/llvm-objdump/X86/coff-disassemble-export.test
  test/tools/llvm-objdump/X86/hex-displacement.test
  test/tools/llvm-objdump/X86/macho-dis-no-leading-addr.test
  test/tools/llvm-objdump/X86/macho-dis-symname.test
  test/tools/llvm-objdump/X86/macho-nontext-disasm.test
  test/tools/llvm-objdump/X86/macho-symbolized-disassembly.test
  test/tools/llvm-objdump/X86/macho-universal-x86_64.i386.test
  test/tools/llvm-objdump/X86/malformed-machos.test
  tools/llvm-objdump/llvm-objdump.cpp

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