[PATCH] D15302: [Greedy regalloc] Replace analyzeSiblingValues with something new [Part1]

[Wei Mi via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL265309: Replace analyzeSiblingValues with new algorithm to fix its compile (authored by wmi).

Changed prior to commit:
  http://reviews.llvm.org/D15302?vs=52569&id=52571#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D15302

Files:
  llvm/trunk/include/llvm/CodeGen/LiveRangeEdit.h
  llvm/trunk/lib/CodeGen/InlineSpiller.cpp
  llvm/trunk/lib/CodeGen/LiveRangeEdit.cpp
  llvm/trunk/lib/CodeGen/RegAllocBase.cpp
  llvm/trunk/lib/CodeGen/RegAllocBase.h
  llvm/trunk/lib/CodeGen/RegAllocBasic.cpp
  llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
  llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
  llvm/trunk/lib/CodeGen/Spiller.h
  llvm/trunk/lib/CodeGen/SplitKit.cpp
  llvm/trunk/lib/CodeGen/SplitKit.h
  llvm/trunk/test/CodeGen/AArch64/aarch64-deferred-spilling.ll
  llvm/trunk/test/CodeGen/X86/fp128-compare.ll
  llvm/trunk/test/CodeGen/X86/hoist-spill.ll
  llvm/trunk/test/CodeGen/X86/new-remat.ll
  llvm/trunk/test/CodeGen/X86/ragreedy-hoist-spill.ll

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