[lld] r264866 - No relocation needs bot SA and ZA.
Rafael Espindola via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 30 06:27:51 PDT 2016
Author: rafael
Date: Wed Mar 30 08:27:50 2016
New Revision: 264866
URL: http://llvm.org/viewvc/llvm-project?rev=264866&view=rev
Log:
No relocation needs bot SA and ZA.
Pass only one of them to relocateOne.
Modified:
lld/trunk/ELF/InputSection.cpp
lld/trunk/ELF/Target.cpp
lld/trunk/ELF/Target.h
Modified: lld/trunk/ELF/InputSection.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/InputSection.cpp?rev=264866&r1=264865&r2=264866&view=diff
==============================================================================
--- lld/trunk/ELF/InputSection.cpp (original)
+++ lld/trunk/ELF/InputSection.cpp Wed Mar 30 08:27:50 2016
@@ -261,7 +261,7 @@ void InputSectionBase<ELFT>::relocate(ui
// that does not have a corresponding symbol.
if (Config->EMachine == EM_PPC64 && RI.getType(false) == R_PPC64_TOC) {
uintX_t SymVA = getPPC64TocBase() + A;
- Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc, SymVA, 0);
+ Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc, SymVA);
continue;
}
@@ -299,8 +299,10 @@ void InputSectionBase<ELFT>::relocate(ui
Body.isPreemptible()) {
continue;
}
- uintX_t Size = Body.getSize<ELFT>();
- Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc, SymVA, Size + A);
+ if (Target->isSizeRel(Type))
+ SymVA = Body.getSize<ELFT>() + A;
+
+ Target->relocateOne(BufLoc, BufEnd, Type, AddrLoc, SymVA);
}
}
Modified: lld/trunk/ELF/Target.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.cpp?rev=264866&r1=264865&r2=264866&view=diff
==============================================================================
--- lld/trunk/ELF/Target.cpp (original)
+++ lld/trunk/ELF/Target.cpp Wed Mar 30 08:27:50 2016
@@ -87,7 +87,7 @@ public:
bool needsGot(uint32_t Type, SymbolBody &S) const override;
bool needsPltImpl(uint32_t Type) const override;
void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
- uint64_t SA, uint64_t ZA = 0) const override;
+ uint64_t SA) const override;
size_t relaxTlsGdToIe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
uint64_t P, uint64_t SA) const override;
@@ -121,7 +121,7 @@ public:
bool refersToGotEntry(uint32_t Type) const override;
bool needsPltImpl(uint32_t Type) const override;
void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
- uint64_t SA, uint64_t ZA = 0) const override;
+ uint64_t SA) const override;
bool isRelRelative(uint32_t Type) const override;
bool isSizeRel(uint32_t Type) const override;
@@ -139,7 +139,7 @@ class PPCTargetInfo final : public Targe
public:
PPCTargetInfo();
void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
- uint64_t SA, uint64_t ZA) const override;
+ uint64_t SA) const override;
bool isRelRelative(uint32_t Type) const override;
};
@@ -151,7 +151,7 @@ public:
bool needsGot(uint32_t Type, SymbolBody &S) const override;
bool needsPltImpl(uint32_t Type) const override;
void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
- uint64_t SA, uint64_t ZA) const override;
+ uint64_t SA) const override;
bool isRelRelative(uint32_t Type) const override;
};
@@ -171,7 +171,7 @@ public:
bool needsGot(uint32_t Type, SymbolBody &S) const override;
bool needsPltImpl(uint32_t Type) const override;
void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
- uint64_t SA, uint64_t ZA = 0) const override;
+ uint64_t SA) const override;
size_t relaxTlsGdToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
uint64_t P, uint64_t SA) const override;
size_t relaxTlsIeToLe(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
@@ -185,7 +185,7 @@ class AMDGPUTargetInfo final : public Ta
public:
AMDGPUTargetInfo() {}
void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
- uint64_t SA, uint64_t ZA) const override;
+ uint64_t SA) const override;
};
template <class ELFT> class MipsTargetInfo final : public TargetInfo {
@@ -202,7 +202,7 @@ public:
bool needsGot(uint32_t Type, SymbolBody &S) const override;
bool needsPltImpl(uint32_t Type) const override;
void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type, uint64_t P,
- uint64_t SA, uint64_t ZA) const override;
+ uint64_t SA) const override;
bool isHintRel(uint32_t Type) const override;
bool isRelRelative(uint32_t Type) const override;
bool refersToGotEntry(uint32_t Type) const override;
@@ -525,7 +525,7 @@ uint64_t X86TargetInfo::getImplicitAdden
}
void X86TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
- uint64_t P, uint64_t SA, uint64_t ZA) const {
+ uint64_t P, uint64_t SA) const {
switch (Type) {
case R_386_32:
write32le(Loc, SA);
@@ -941,7 +941,7 @@ size_t X86_64TargetInfo::relaxTlsLdToLe(
}
void X86_64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
- uint64_t P, uint64_t SA, uint64_t ZA) const {
+ uint64_t P, uint64_t SA) const {
switch (Type) {
case R_X86_64_32:
checkUInt<32>(SA, Type);
@@ -968,10 +968,10 @@ void X86_64TargetInfo::relocateOne(uint8
write32le(Loc, SA - P);
break;
case R_X86_64_SIZE32:
- write32le(Loc, ZA);
+ write32le(Loc, SA);
break;
case R_X86_64_SIZE64:
- write64le(Loc, ZA);
+ write64le(Loc, SA);
break;
case R_X86_64_TPOFF32: {
uint64_t Val = SA - Out<ELF64LE>::TlsPhdr->p_memsz;
@@ -1000,7 +1000,7 @@ PPCTargetInfo::PPCTargetInfo() {}
bool PPCTargetInfo::isRelRelative(uint32_t Type) const { return false; }
void PPCTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
- uint64_t P, uint64_t SA, uint64_t ZA) const {
+ uint64_t P, uint64_t SA) const {
switch (Type) {
case R_PPC_ADDR16_HA:
write16be(Loc, applyPPCHa(SA));
@@ -1103,7 +1103,7 @@ bool PPC64TargetInfo::isRelRelative(uint
}
void PPC64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
- uint64_t P, uint64_t SA, uint64_t ZA) const {
+ uint64_t P, uint64_t SA) const {
uint64_t TB = getPPC64TocBase();
// For a TOC-relative relocation, adjust the addend and proceed in terms of
@@ -1393,8 +1393,8 @@ static uint64_t getAArch64Page(uint64_t
}
void AArch64TargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd,
- uint32_t Type, uint64_t P, uint64_t SA,
- uint64_t ZA) const {
+ uint32_t Type, uint64_t P,
+ uint64_t SA) const {
switch (Type) {
case R_AARCH64_ABS16:
checkIntUInt<16>(SA, Type);
@@ -1569,7 +1569,7 @@ size_t AArch64TargetInfo::relaxTlsIeToLe
// actually called (relocateOne is called for each relocation).
// That's why the AMDGPU port works without implementing this function.
void AMDGPUTargetInfo::relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
- uint64_t P, uint64_t SA, uint64_t ZA) const {
+ uint64_t P, uint64_t SA) const {
llvm_unreachable("not implemented");
}
@@ -1750,8 +1750,8 @@ uint64_t MipsTargetInfo<ELFT>::getImplic
template <class ELFT>
void MipsTargetInfo<ELFT>::relocateOne(uint8_t *Loc, uint8_t *BufEnd,
- uint32_t Type, uint64_t P, uint64_t SA,
- uint64_t ZA) const {
+ uint32_t Type, uint64_t P,
+ uint64_t SA) const {
const endianness E = ELFT::TargetEndianness;
// Thread pointer and DRP offsets from the start of TLS data area.
// https://www.linux-mips.org/wiki/NPTL
Modified: lld/trunk/ELF/Target.h
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.h?rev=264866&r1=264865&r2=264866&view=diff
==============================================================================
--- lld/trunk/ELF/Target.h (original)
+++ lld/trunk/ELF/Target.h Wed Mar 30 08:27:50 2016
@@ -63,7 +63,7 @@ public:
PltNeed needsPlt(uint32_t Type, const SymbolBody &S) const;
virtual void relocateOne(uint8_t *Loc, uint8_t *BufEnd, uint32_t Type,
- uint64_t P, uint64_t SA, uint64_t ZA = 0) const = 0;
+ uint64_t P, uint64_t SA) const = 0;
virtual bool isGotRelative(uint32_t Type) const;
bool canRelaxTls(uint32_t Type, const SymbolBody *S) const;
template <class ELFT>
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