[PATCH] D17885: [Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random number, set bool, and dfp test significance

[Kit Barton via llvm-commits]

kbarton added a comment.

In http://reviews.llvm.org/D17885#372141, @nemanjai wrote:

> In http://reviews.llvm.org/D17885#372077, @amehsan wrote:
>
> > @nemanjai If I understand correctly you are saying a better name for P8Vector would have used ISA version instead of http://reviews.llvm.org/P8 in the feature name. Is that correct?
>
>
> I don't think we need to change existing names even though I feel that referencing the chip in the feature name can be misleading. But when the feature is simply called "FeatureP9", I think that's a bit misleading if any other chips end up implementing ISA 3.0.
>  I think for specific subfeatures such as the direct moves, it is OK to continue to use the names we have been using. Then the ISA 3.0 feature (whatever we name it) will imply all of these Power 9 features.


I agree with @nemanjai. Please use the ISA3.0 feature, from [[ (http://reviews.llvm.org/D18032 | http://reviews.llvm.org/D18032 ]] to guard these instructions.


http://reviews.llvm.org/D17885