[PATCH] D17222: LegalizeDAG: Don't replace vector load with integer unless legal

Owen Anderson via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 29 12:35:20 PDT 2016

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resistor accepted this revision.
resistor added a comment.
This revision is now accepted and ready to land.

LGTM


http://reviews.llvm.org/D17222

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