[llvm] r264703 - Added 2 notes

[Elena Demikhovsky via llvm-commits]

Author: delena
Date: Tue Mar 29 01:55:56 2016
New Revision: 264703

URL: http://llvm.org/viewvc/llvm-project?rev=264703&view=rev
Log:
Added 2 notes
1) Skylake and KNL support for X86
2) masked intrinsics load/store/gather/scatter

Differential Revision: http://reviews.llvm.org/D18353


Modified:
    llvm/trunk/docs/ReleaseNotes.rst

Modified: llvm/trunk/docs/ReleaseNotes.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/ReleaseNotes.rst?rev=264703&r1=264702&r2=264703&view=diff
==============================================================================
--- llvm/trunk/docs/ReleaseNotes.rst (original)
+++ llvm/trunk/docs/ReleaseNotes.rst Tue Mar 29 01:55:56 2016
@@ -71,6 +71,13 @@ Non-comprehensive list of changes in thi
 
    Makes programs 10x faster by doing Special New Thing.
 
+Changes to the LLVM IR
+----------------------
+
+* New intrinsics ``llvm.masked.load``, ``llvm.masked.store``,
+  ``llvm.masked.gather`` and ``llvm.masked.scatter`` were introduced to the
+  LLVM IR to allow selective memory access for vector data types.
+
 Changes to the ARM Backend
 --------------------------
 
@@ -90,9 +97,15 @@ Changes to the PowerPC Target
 
 
 Changes to the X86 Target
------------------------------
+-------------------------
 
- During this release ...
+* LLVM now supports the Intel CPU codenamed Skylake Server with AVX-512
+  extensions using ``-march=skylake-avx512``. The switch enables the
+  ISA extensions AVX-512{F, CD, VL, BW, DQ}.
+
+* LLVM now supports the Intel CPU codenamed Knights Landing with AVX-512
+  extensions using ``-march=knl``. The switch enables the ISA extensions
+  AVX-512{F, CD, ER, PF}.
 
 Changes to the AMDGPU Target
 -----------------------------