[PATCH] D18421: [WIP] MachineFunction Properties

[Derek Schuff via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL264593: Introduce MachineFunctionProperties and the AllVRegsAllocated property (authored by dschuff).

Changed prior to commit:
  http://reviews.llvm.org/D18421?vs=51801&id=51802#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D18421

Files:
  llvm/trunk/include/llvm/CodeGen/MIRYamlMapping.h
  llvm/trunk/include/llvm/CodeGen/MachineFunction.h
  llvm/trunk/include/llvm/CodeGen/MachineFunctionPass.h
  llvm/trunk/lib/CodeGen/FuncletLayout.cpp
  llvm/trunk/lib/CodeGen/ImplicitNullChecks.cpp
  llvm/trunk/lib/CodeGen/LiveDebugValues.cpp
  llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp
  llvm/trunk/lib/CodeGen/MIRPrinter.cpp
  llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp
  llvm/trunk/lib/CodeGen/MachineFunctionPass.cpp
  llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
  llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
  llvm/trunk/lib/CodeGen/RegAllocBasic.cpp
  llvm/trunk/lib/CodeGen/RegAllocFast.cpp
  llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
  llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
  llvm/trunk/lib/CodeGen/StackMapLivenessAnalysis.cpp
  llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp
  llvm/trunk/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
  llvm/trunk/test/CodeGen/MIR/AArch64/machine-dead-copy.mir
  llvm/trunk/test/CodeGen/MIR/ARM/sched-it-debug-nodes.mir
  llvm/trunk/test/CodeGen/X86/machine-copy-prop.mir
  llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
  llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir

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