[PATCH] D18492: [X86][SSE] Vectorize a bit (AND/XOR/OR) op if a BUILD_VECTOR has the same op for all their scalar elements.

[Simon Pilgrim via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: chandlerc, delena, andreadb, spatel.
RKSimon added a subscriber: llvm-commits.
RKSimon set the repository for this revision to rL LLVM.

If all a BUILD_VECTOR's source elements are the same bit (AND/XOR/OR) operation type and each has one constant operand, lower to a pair of BUILD_VECTOR and just apply the bit operation to the vectors.

The constant operands will form a constant vector meaning that we still only have a single BUILD_VECTOR to lower and we will have replaced all the scalarized operations with a single SSE equivalent.

Its probably not in our interest to start make a general purpose vectorizer from this, but I'm seeing enough of these scalar bit operations from the later legalization/scalarization stages to support them at least.

Repository:
  rL LLVM

http://reviews.llvm.org/D18492

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/pr15267.ll
  test/CodeGen/X86/vector-lzcnt-256.ll
  test/CodeGen/X86/vector-pcmp.ll
  test/CodeGen/X86/vector-sext.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D18492.51719.patch
Type: text/x-patch
Size: 35523 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20160326/afab0052/attachment.bin>