[PATCH] D16807: [mips] MUL macro variations

[Srdjan Obucina via llvm-commits]

obucina marked an inline comment as done.

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Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:3691
@@ +3690,3 @@
+    if (AssemblerOptions.back()->isReorder())
+      createNop(false, IDLoc, Instructions);
+    emitII(Mips::BREAK,6, 0, IDLoc, Instructions);
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It is unclear to me what do you suggest regarding micromips potential problem with branch offset. Please be more precise.

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Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:3722
@@ +3721,3 @@
+    emitII(Mips::BREAK, 6, 0, IDLoc, Instructions);
+  }
+
----------------
It is unclear to me what do you suggest regarding micromips potential problem with branch offset. Please be more precise.


http://reviews.llvm.org/D16807