[llvm] r263729 - [AMDGPU] add VI disassembler tests. NFC.
Valery Pykhtin via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 17 10:56:34 PDT 2016
Author: vpykhtin
Date: Thu Mar 17 12:56:33 2016
New Revision: 263729
URL: http://llvm.org/viewvc/llvm-project?rev=263729&view=rev
Log:
[AMDGPU] add VI disassembler tests. NFC.
Autogenerated from the corresponding assembler tests with a few FIXME added (will fix soon).
Differential Revision: http://reviews.llvm.org/D18249
Added:
llvm/trunk/test/MC/Disassembler/AMDGPU/ds_vi.txt
llvm/trunk/test/MC/Disassembler/AMDGPU/flat_vi.txt
llvm/trunk/test/MC/Disassembler/AMDGPU/smem_vi.txt
llvm/trunk/test/MC/Disassembler/AMDGPU/sop1_vi.txt
llvm/trunk/test/MC/Disassembler/AMDGPU/sop2_vi.txt
llvm/trunk/test/MC/Disassembler/AMDGPU/sopc_vi.txt
llvm/trunk/test/MC/Disassembler/AMDGPU/sopk_vi.txt
llvm/trunk/test/MC/Disassembler/AMDGPU/sopp_vi.txt
llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt
llvm/trunk/test/MC/Disassembler/AMDGPU/vop2_vi.txt
llvm/trunk/test/MC/Disassembler/AMDGPU/vop3_vi.txt
Modified:
llvm/trunk/test/MC/Disassembler/AMDGPU/smrd_vi.txt
llvm/trunk/test/MC/Disassembler/AMDGPU/vopc_vi.txt
Added: llvm/trunk/test/MC/Disassembler/AMDGPU/ds_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/ds_vi.txt?rev=263729&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/ds_vi.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/ds_vi.txt Thu Mar 17 12:56:33 2016
@@ -0,0 +1,325 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+
+# VI: ds_add_u32 v2, v4 offset:16 ; encoding: [0x10,0x00,0x00,0xd8,0x02,0x04,0x00,0x00]
+0x10 0x00 0x00 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_write2_b32 v2, v4, v6 offset0:4 ; encoding: [0x04,0x00,0x1c,0xd8,0x02,0x04,0x06,0x00]
+0x04 0x00 0x1c 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_write2_b32 v2, v4, v6 offset0:4 offset1:8 ; encoding: [0x04,0x08,0x1c,0xd8,0x02,0x04,0x06,0x00]
+0x04 0x08 0x1c 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_write2_b32 v2, v4, v6 offset1:8 ; encoding: [0x00,0x08,0x1c,0xd8,0x02,0x04,0x06,0x00]
+0x00 0x08 0x1c 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_read2_b32 v[8:9], v2 offset0:4 ; encoding: [0x04,0x00,0x6e,0xd8,0x02,0x00,0x00,0x08]
+0x04 0x00 0x6e 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_read2_b32 v[8:9], v2 offset0:4 offset1:8 ; encoding: [0x04,0x08,0x6e,0xd8,0x02,0x00,0x00,0x08]
+0x04 0x08 0x6e 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_read2_b32 v[8:9], v2 offset1:8 ; encoding: [0x00,0x08,0x6e,0xd8,0x02,0x00,0x00,0x08]
+0x00 0x08 0x6e 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_add_u32 v2, v4 ; encoding: [0x00,0x00,0x00,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x00 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_sub_u32 v2, v4 ; encoding: [0x00,0x00,0x02,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x02 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_rsub_u32 v2, v4 ; encoding: [0x00,0x00,0x04,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x04 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_inc_u32 v2, v4 ; encoding: [0x00,0x00,0x06,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x06 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_dec_u32 v2, v4 ; encoding: [0x00,0x00,0x08,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x08 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_min_i32 v2, v4 ; encoding: [0x00,0x00,0x0a,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x0a 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_max_i32 v2, v4 ; encoding: [0x00,0x00,0x0c,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x0c 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_min_u32 v2, v4 ; encoding: [0x00,0x00,0x0e,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x0e 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_max_u32 v2, v4 ; encoding: [0x00,0x00,0x10,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x10 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_and_b32 v2, v4 ; encoding: [0x00,0x00,0x12,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x12 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_or_b32 v2, v4 ; encoding: [0x00,0x00,0x14,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x14 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_xor_b32 v2, v4 ; encoding: [0x00,0x00,0x16,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x16 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_mskor_b32 v2, v4, v6 ; encoding: [0x00,0x00,0x18,0xd8,0x02,0x04,0x06,0x00]
+0x00 0x00 0x18 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_write_b32 v2, v4 ; encoding: [0x00,0x00,0x1a,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x1a 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_write2_b32 v2, v4, v6 ; encoding: [0x00,0x00,0x1c,0xd8,0x02,0x04,0x06,0x00]
+0x00 0x00 0x1c 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_write2st64_b32 v2, v4, v6 ; encoding: [0x00,0x00,0x1e,0xd8,0x02,0x04,0x06,0x00]
+0x00 0x00 0x1e 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_cmpst_b32 v2, v4, v6 ; encoding: [0x00,0x00,0x20,0xd8,0x02,0x04,0x06,0x00]
+0x00 0x00 0x20 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_cmpst_f32 v2, v4, v6 ; encoding: [0x00,0x00,0x22,0xd8,0x02,0x04,0x06,0x00]
+0x00 0x00 0x22 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_min_f32 v2, v4, v6 ; encoding: [0x00,0x00,0x24,0xd8,0x02,0x04,0x06,0x00]
+0x00 0x00 0x24 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_max_f32 v2, v4, v6 ; encoding: [0x00,0x00,0x26,0xd8,0x02,0x04,0x06,0x00]
+0x00 0x00 0x26 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_gws_init v2 gds ; encoding: [0x00,0x00,0x33,0xd8,0x02,0x00,0x00,0x00]
+0x00 0x00 0x33 0xd8 0x02 0x00 0x00 0x00
+
+# VI: ds_gws_sema_v v2 gds ; encoding: [0x00,0x00,0x35,0xd8,0x02,0x00,0x00,0x00]
+0x00 0x00 0x35 0xd8 0x02 0x00 0x00 0x00
+
+# VI: ds_gws_sema_br v2 gds ; encoding: [0x00,0x00,0x37,0xd8,0x02,0x00,0x00,0x00]
+0x00 0x00 0x37 0xd8 0x02 0x00 0x00 0x00
+
+# VI: ds_gws_sema_p v2 gds ; encoding: [0x00,0x00,0x39,0xd8,0x02,0x00,0x00,0x00]
+0x00 0x00 0x39 0xd8 0x02 0x00 0x00 0x00
+
+# VI: ds_gws_barrier v2 gds ; encoding: [0x00,0x00,0x3b,0xd8,0x02,0x00,0x00,0x00]
+0x00 0x00 0x3b 0xd8 0x02 0x00 0x00 0x00
+
+# VI: ds_write_b8 v2, v4 ; encoding: [0x00,0x00,0x3c,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x3c 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_write_b16 v2, v4 ; encoding: [0x00,0x00,0x3e,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x3e 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_add_rtn_u32 v8, v2, v4 ; encoding: [0x00,0x00,0x40,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0x40 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_sub_rtn_u32 v8, v2, v4 ; encoding: [0x00,0x00,0x42,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0x42 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_rsub_rtn_u32 v8, v2, v4 ; encoding: [0x00,0x00,0x44,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0x44 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_inc_rtn_u32 v8, v2, v4 ; encoding: [0x00,0x00,0x46,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0x46 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_dec_rtn_u32 v8, v2, v4 ; encoding: [0x00,0x00,0x48,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0x48 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_min_rtn_i32 v8, v2, v4 ; encoding: [0x00,0x00,0x4a,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0x4a 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_max_rtn_i32 v8, v2, v4 ; encoding: [0x00,0x00,0x4c,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0x4c 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_min_rtn_u32 v8, v2, v4 ; encoding: [0x00,0x00,0x4e,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0x4e 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_max_rtn_u32 v8, v2, v4 ; encoding: [0x00,0x00,0x50,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0x50 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_and_rtn_b32 v8, v2, v4 ; encoding: [0x00,0x00,0x52,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0x52 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_or_rtn_b32 v8, v2, v4 ; encoding: [0x00,0x00,0x54,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0x54 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_xor_rtn_b32 v8, v2, v4 ; encoding: [0x00,0x00,0x56,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0x56 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_mskor_rtn_b32 v8, v2, v4, v6 ; encoding: [0x00,0x00,0x58,0xd8,0x02,0x04,0x06,0x08]
+0x00 0x00 0x58 0xd8 0x02 0x04 0x06 0x08
+
+# VI: ds_wrxchg_rtn_b32 v8, v2, v4 ; encoding: [0x00,0x00,0x5a,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0x5a 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_wrxchg2_rtn_b32 v[8:9], v2, v4, v6 ; encoding: [0x00,0x00,0x5c,0xd8,0x02,0x04,0x06,0x08]
+0x00 0x00 0x5c 0xd8 0x02 0x04 0x06 0x08
+
+# VI: ds_wrxchg2st64_rtn_b32 v[8:9], v2, v4, v6 ; encoding: [0x00,0x00,0x5e,0xd8,0x02,0x04,0x06,0x08]
+0x00 0x00 0x5e 0xd8 0x02 0x04 0x06 0x08
+
+# VI: ds_cmpst_rtn_b32 v8, v2, v4, v6 ; encoding: [0x00,0x00,0x60,0xd8,0x02,0x04,0x06,0x08]
+0x00 0x00 0x60 0xd8 0x02 0x04 0x06 0x08
+
+# VI: ds_cmpst_rtn_f32 v8, v2, v4, v6 ; encoding: [0x00,0x00,0x62,0xd8,0x02,0x04,0x06,0x08]
+0x00 0x00 0x62 0xd8 0x02 0x04 0x06 0x08
+
+# VI: ds_min_rtn_f32 v8, v2, v4, v6 ; encoding: [0x00,0x00,0x64,0xd8,0x02,0x04,0x06,0x08]
+0x00 0x00 0x64 0xd8 0x02 0x04 0x06 0x08
+
+# VI: ds_max_rtn_f32 v8, v2, v4, v6 ; encoding: [0x00,0x00,0x66,0xd8,0x02,0x04,0x06,0x08]
+0x00 0x00 0x66 0xd8 0x02 0x04 0x06 0x08
+
+# VI: ds_swizzle_b32 v8, v2 ; encoding: [0x00,0x00,0x6a,0xd8,0x02,0x00,0x00,0x08]
+0x00 0x00 0x6a 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_read_b32 v8, v2 ; encoding: [0x00,0x00,0x6c,0xd8,0x02,0x00,0x00,0x08]
+0x00 0x00 0x6c 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_read2_b32 v[8:9], v2 ; encoding: [0x00,0x00,0x6e,0xd8,0x02,0x00,0x00,0x08]
+0x00 0x00 0x6e 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_read2st64_b32 v[8:9], v2 ; encoding: [0x00,0x00,0x70,0xd8,0x02,0x00,0x00,0x08]
+0x00 0x00 0x70 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_read_i8 v8, v2 ; encoding: [0x00,0x00,0x72,0xd8,0x02,0x00,0x00,0x08]
+0x00 0x00 0x72 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_read_u8 v8, v2 ; encoding: [0x00,0x00,0x74,0xd8,0x02,0x00,0x00,0x08]
+0x00 0x00 0x74 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_read_i16 v8, v2 ; encoding: [0x00,0x00,0x76,0xd8,0x02,0x00,0x00,0x08]
+0x00 0x00 0x76 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_read_u16 v8, v2 ; encoding: [0x00,0x00,0x78,0xd8,0x02,0x00,0x00,0x08]
+0x00 0x00 0x78 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_consume v8 ; encoding: [0x00,0x00,0x7a,0xd8,0x00,0x00,0x00,0x08]
+0x00 0x00 0x7a 0xd8 0x00 0x00 0x00 0x08
+
+# FIXME: ds_append v8 ; encoding: [0x00,0x00,0x7c,0xd8,0x00,0x00,0x00,0x08]
+0x00 0x00 0x7c 0xd8 0x00 0x00 0x00 0x08
+
+# VI: ds_ordered_count v8, v2 gds ; encoding: [0x00,0x00,0x7f,0xd8,0x02,0x00,0x00,0x08]
+0x00 0x00 0x7f 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_add_u64 v2, v[4:5] ; encoding: [0x00,0x00,0x80,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x80 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_sub_u64 v2, v[4:5] ; encoding: [0x00,0x00,0x82,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x82 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_rsub_u64 v2, v[4:5] ; encoding: [0x00,0x00,0x84,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x84 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_inc_u64 v2, v[4:5] ; encoding: [0x00,0x00,0x86,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x86 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_dec_u64 v2, v[4:5] ; encoding: [0x00,0x00,0x88,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x88 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_min_i64 v2, v[4:5] ; encoding: [0x00,0x00,0x8a,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x8a 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_max_i64 v2, v[4:5] ; encoding: [0x00,0x00,0x8c,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x8c 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_min_u64 v2, v[4:5] ; encoding: [0x00,0x00,0x8e,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x8e 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_max_u64 v2, v[4:5] ; encoding: [0x00,0x00,0x90,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x90 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_and_b64 v2, v[4:5] ; encoding: [0x00,0x00,0x92,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x92 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_or_b64 v2, v[4:5] ; encoding: [0x00,0x00,0x94,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x94 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_xor_b64 v2, v[4:5] ; encoding: [0x00,0x00,0x96,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x96 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_mskor_b64 v2, v[4:5], v[6:7] ; encoding: [0x00,0x00,0x98,0xd8,0x02,0x04,0x06,0x00]
+0x00 0x00 0x98 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_write_b64 v2, v[4:5] ; encoding: [0x00,0x00,0x9a,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0x9a 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_write2_b64 v2, v[4:5], v[6:7] ; encoding: [0x00,0x00,0x9c,0xd8,0x02,0x04,0x06,0x00]
+0x00 0x00 0x9c 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_write2st64_b64 v2, v[4:5], v[6:7] ; encoding: [0x00,0x00,0x9e,0xd8,0x02,0x04,0x06,0x00]
+0x00 0x00 0x9e 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_cmpst_b64 v2, v[4:5], v[6:7] ; encoding: [0x00,0x00,0xa0,0xd8,0x02,0x04,0x06,0x00]
+0x00 0x00 0xa0 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_cmpst_f64 v2, v[4:5], v[6:7] ; encoding: [0x00,0x00,0xa2,0xd8,0x02,0x04,0x06,0x00]
+0x00 0x00 0xa2 0xd8 0x02 0x04 0x06 0x00
+
+# VI: ds_min_f64 v2, v[4:5] ; encoding: [0x00,0x00,0xa4,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0xa4 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_max_f64 v2, v[4:5] ; encoding: [0x00,0x00,0xa6,0xd8,0x02,0x04,0x00,0x00]
+0x00 0x00 0xa6 0xd8 0x02 0x04 0x00 0x00
+
+# VI: ds_add_rtn_u64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xc0,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xc0 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_sub_rtn_u64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xc2,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xc2 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_rsub_rtn_u64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xc4,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xc4 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_inc_rtn_u64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xc6,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xc6 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_dec_rtn_u64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xc8,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xc8 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_min_rtn_i64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xca,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xca 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_max_rtn_i64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xcc,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xcc 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_min_rtn_u64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xce,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xce 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_max_rtn_u64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xd0,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xd0 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_and_rtn_b64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xd2,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xd2 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_or_rtn_b64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xd4,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xd4 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_xor_rtn_b64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xd6,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xd6 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_mskor_rtn_b64 v[8:9], v2, v[4:5], v[6:7] ; encoding: [0x00,0x00,0xd8,0xd8,0x02,0x04,0x06,0x08]
+0x00 0x00 0xd8 0xd8 0x02 0x04 0x06 0x08
+
+# VI: ds_wrxchg_rtn_b64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xda,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xda 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_wrxchg2_rtn_b64 v[8:11], v2, v[4:5], v[6:7] ; encoding: [0x00,0x00,0xdc,0xd8,0x02,0x04,0x06,0x08]
+0x00 0x00 0xdc 0xd8 0x02 0x04 0x06 0x08
+
+# VI: ds_wrxchg2st64_rtn_b64 v[8:11], v2, v[4:5], v[6:7] ; encoding: [0x00,0x00,0xde,0xd8,0x02,0x04,0x06,0x08]
+0x00 0x00 0xde 0xd8 0x02 0x04 0x06 0x08
+
+# VI: ds_cmpst_rtn_b64 v[8:9], v2, v[4:5], v[6:7] ; encoding: [0x00,0x00,0xe0,0xd8,0x02,0x04,0x06,0x08]
+0x00 0x00 0xe0 0xd8 0x02 0x04 0x06 0x08
+
+# VI: ds_cmpst_rtn_f64 v[8:9], v2, v[4:5], v[6:7] ; encoding: [0x00,0x00,0xe2,0xd8,0x02,0x04,0x06,0x08]
+0x00 0x00 0xe2 0xd8 0x02 0x04 0x06 0x08
+
+# VI: ds_min_rtn_f64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xe4,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xe4 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_max_rtn_f64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xe6,0xd8,0x02,0x04,0x00,0x08]
+0x00 0x00 0xe6 0xd8 0x02 0x04 0x00 0x08
+
+# VI: ds_read_b64 v[8:9], v2 ; encoding: [0x00,0x00,0xec,0xd8,0x02,0x00,0x00,0x08]
+0x00 0x00 0xec 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_read2_b64 v[8:11], v2 ; encoding: [0x00,0x00,0xee,0xd8,0x02,0x00,0x00,0x08]
+0x00 0x00 0xee 0xd8 0x02 0x00 0x00 0x08
+
+# VI: ds_read2st64_b64 v[8:11], v2 ; encoding: [0x00,0x00,0xf0,0xd8,0x02,0x00,0x00,0x08]
+0x00 0x00 0xf0 0xd8 0x02 0x00 0x00 0x08
Added: llvm/trunk/test/MC/Disassembler/AMDGPU/flat_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/flat_vi.txt?rev=263729&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/flat_vi.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/flat_vi.txt Thu Mar 17 12:56:33 2016
@@ -0,0 +1,229 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+
+# VI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x50,0xdc,0x03,0x00,0x00,0x01]
+0x00 0x00 0x50 0xdc 0x03 0x00 0x00 0x01
+
+# VI: flat_load_dword v1, v[3:4] glc ; encoding: [0x00,0x00,0x51,0xdc,0x03,0x00,0x00,0x01]
+0x00 0x00 0x51 0xdc 0x03 0x00 0x00 0x01
+
+# VI: flat_load_dword v1, v[3:4] glc slc ; encoding: [0x00,0x00,0x53,0xdc,0x03,0x00,0x00,0x01]
+0x00 0x00 0x53 0xdc 0x03 0x00 0x00 0x01
+
+# VI: flat_load_dword v1, v[3:4] glc tfe ; encoding: [0x00,0x00,0x51,0xdc,0x03,0x00,0x80,0x01]
+0x00 0x00 0x51 0xdc 0x03 0x00 0x80 0x01
+
+# VI: flat_load_dword v1, v[3:4] glc slc tfe ; encoding: [0x00,0x00,0x53,0xdc,0x03,0x00,0x80,0x01]
+0x00 0x00 0x53 0xdc 0x03 0x00 0x80 0x01
+
+# VI: flat_load_dword v1, v[3:4] slc ; encoding: [0x00,0x00,0x52,0xdc,0x03,0x00,0x00,0x01]
+0x00 0x00 0x52 0xdc 0x03 0x00 0x00 0x01
+
+# VI: flat_load_dword v1, v[3:4] slc tfe ; encoding: [0x00,0x00,0x52,0xdc,0x03,0x00,0x80,0x01]
+0x00 0x00 0x52 0xdc 0x03 0x00 0x80 0x01
+
+# VI: flat_load_dword v1, v[3:4] tfe ; encoding: [0x00,0x00,0x50,0xdc,0x03,0x00,0x80,0x01]
+0x00 0x00 0x50 0xdc 0x03 0x00 0x80 0x01
+
+# VI: flat_atomic_add v1, v[3:4], v5 glc slc ; encoding: [0x00,0x00,0x0b,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x0b 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_add v1, v[3:4], v5 glc tfe ; encoding: [0x00,0x00,0x09,0xdd,0x03,0x05,0x80,0x01]
+0x00 0x00 0x09 0xdd 0x03 0x05 0x80 0x01
+
+# VI: flat_atomic_add v1, v[3:4], v5 glc slc tfe ; encoding: [0x00,0x00,0x0b,0xdd,0x03,0x05,0x80,0x01]
+0x00 0x00 0x0b 0xdd 0x03 0x05 0x80 0x01
+
+# VI: flat_atomic_add v[3:4], v5 slc ; encoding: [0x00,0x00,0x0a,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x0a 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_add v[3:4], v5 slc tfe ; encoding: [0x00,0x00,0x0a,0xdd,0x03,0x05,0x80,0x00]
+0x00 0x00 0x0a 0xdd 0x03 0x05 0x80 0x00
+
+# VI: flat_atomic_add v[3:4], v5 tfe ; encoding: [0x00,0x00,0x08,0xdd,0x03,0x05,0x80,0x00]
+0x00 0x00 0x08 0xdd 0x03 0x05 0x80 0x00
+
+# VI: flat_load_ubyte v1, v[3:4] ; encoding: [0x00,0x00,0x40,0xdc,0x03,0x00,0x00,0x01]
+0x00 0x00 0x40 0xdc 0x03 0x00 0x00 0x01
+
+# VI: flat_load_sbyte v1, v[3:4] ; encoding: [0x00,0x00,0x44,0xdc,0x03,0x00,0x00,0x01]
+0x00 0x00 0x44 0xdc 0x03 0x00 0x00 0x01
+
+# VI: flat_load_ushort v1, v[3:4] ; encoding: [0x00,0x00,0x48,0xdc,0x03,0x00,0x00,0x01]
+0x00 0x00 0x48 0xdc 0x03 0x00 0x00 0x01
+
+# VI: flat_load_sshort v1, v[3:4] ; encoding: [0x00,0x00,0x4c,0xdc,0x03,0x00,0x00,0x01]
+0x00 0x00 0x4c 0xdc 0x03 0x00 0x00 0x01
+
+# VI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x50,0xdc,0x03,0x00,0x00,0x01]
+0x00 0x00 0x50 0xdc 0x03 0x00 0x00 0x01
+
+# VI: flat_load_dwordx2 v[1:2], v[3:4] ; encoding: [0x00,0x00,0x54,0xdc,0x03,0x00,0x00,0x01]
+0x00 0x00 0x54 0xdc 0x03 0x00 0x00 0x01
+
+# VI: flat_load_dwordx4 v[5:8], v[3:4] ; encoding: [0x00,0x00,0x5c,0xdc,0x03,0x00,0x00,0x05]
+0x00 0x00 0x5c 0xdc 0x03 0x00 0x00 0x05
+
+# VI: flat_load_dwordx3 v[5:7], v[3:4] ; encoding: [0x00,0x00,0x58,0xdc,0x03,0x00,0x00,0x05]
+0x00 0x00 0x58 0xdc 0x03 0x00 0x00 0x05
+
+# VI: flat_store_dwordx4 v[3:4], v[5:8] ; encoding: [0x00,0x00,0x7c,0xdc,0x03,0x05,0x00,0x00]
+0x00 0x00 0x7c 0xdc 0x03 0x05 0x00 0x00
+
+# VI: flat_store_dwordx3 v[3:4], v[5:7] ; encoding: [0x00,0x00,0x78,0xdc,0x03,0x05,0x00,0x00]
+0x00 0x00 0x78 0xdc 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_swap v[3:4], v5 ; encoding: [0x00,0x00,0x00,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x00 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_swap v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x01,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x01 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_cmpswap v[3:4], v[5:6] ; encoding: [0x00,0x00,0x04,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x04 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_cmpswap v1, v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x05,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x05 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_add v[3:4], v5 ; encoding: [0x00,0x00,0x08,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x08 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_add v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x09,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x09 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_sub v[3:4], v5 ; encoding: [0x00,0x00,0x0c,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x0c 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_sub v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x0d,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x0d 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_smin v[3:4], v5 ; encoding: [0x00,0x00,0x10,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x10 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_smin v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x11,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x11 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_umin v[3:4], v5 ; encoding: [0x00,0x00,0x14,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x14 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_umin v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x15,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x15 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_smax v[3:4], v5 ; encoding: [0x00,0x00,0x18,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x18 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_smax v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x19,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x19 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_umax v[3:4], v5 ; encoding: [0x00,0x00,0x1c,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x1c 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_umax v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x1d,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x1d 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_and v[3:4], v5 ; encoding: [0x00,0x00,0x20,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x20 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_and v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x21,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x21 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_or v[3:4], v5 ; encoding: [0x00,0x00,0x24,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x24 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_or v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x25,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x25 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_xor v[3:4], v5 ; encoding: [0x00,0x00,0x28,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x28 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_xor v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x29,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x29 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_inc v[3:4], v5 ; encoding: [0x00,0x00,0x2c,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x2c 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_inc v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x2d,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x2d 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_dec v[3:4], v5 ; encoding: [0x00,0x00,0x30,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x30 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_dec v1, v[3:4], v5 glc ; encoding: [0x00,0x00,0x31,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x31 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_swap_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x80,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x80 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_swap_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x81,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x81 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_cmpswap_x2 v[3:4], v[5:8] ; encoding: [0x00,0x00,0x84,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x84 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_cmpswap_x2 v[1:2], v[3:4], v[5:8] glc ; encoding: [0x00,0x00,0x85,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x85 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_add_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x88,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x88 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_add_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x89,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x89 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_sub_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x8c,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x8c 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_sub_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x8d,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x8d 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_smin_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x90,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x90 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_smin_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x91,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x91 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_umin_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x94,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x94 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_umin_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x95,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x95 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_smax_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x98,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x98 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_smax_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x99,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x99 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_umax_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0x9c,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0x9c 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_umax_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0x9d,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0x9d 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_and_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0xa0,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0xa0 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_and_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0xa1,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0xa1 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_or_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0xa4,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0xa4 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_or_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0xa5,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0xa5 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_xor_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0xa8,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0xa8 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_xor_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0xa9,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0xa9 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_inc_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0xac,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0xac 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_inc_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0xad,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0xad 0xdd 0x03 0x05 0x00 0x01
+
+# VI: flat_atomic_dec_x2 v[3:4], v[5:6] ; encoding: [0x00,0x00,0xb0,0xdd,0x03,0x05,0x00,0x00]
+0x00 0x00 0xb0 0xdd 0x03 0x05 0x00 0x00
+
+# VI: flat_atomic_dec_x2 v[1:2], v[3:4], v[5:6] glc ; encoding: [0x00,0x00,0xb1,0xdd,0x03,0x05,0x00,0x01]
+0x00 0x00 0xb1 0xdd 0x03 0x05 0x00 0x01
Added: llvm/trunk/test/MC/Disassembler/AMDGPU/smem_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/smem_vi.txt?rev=263729&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/smem_vi.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/smem_vi.txt Thu Mar 17 12:56:33 2016
@@ -0,0 +1,10 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+
+# VI: s_dcache_wb ; encoding: [0x00,0x00,0x84,0xc0,0x00,0x00,0x00,0x00]
+0x00 0x00 0x84 0xc0 0x00 0x00 0x00 0x00
+
+# VI: s_dcache_wb_vol ; encoding: [0x00,0x00,0x8c,0xc0,0x00,0x00,0x00,0x00]
+0x00 0x00 0x8c 0xc0 0x00 0x00 0x00 0x00
+
+# VI: s_memrealtime s[4:5] ; encoding: [0x00,0x01,0x94,0xc0,0x00,0x00,0x00,0x00]
+0x00 0x01 0x94 0xc0 0x00 0x00 0x00 0x00
Modified: llvm/trunk/test/MC/Disassembler/AMDGPU/smrd_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/smrd_vi.txt?rev=263729&r1=263728&r2=263729&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/smrd_vi.txt (original)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/smrd_vi.txt Thu Mar 17 12:56:33 2016
@@ -1,4 +1,10 @@
-# RUN: llvm-mc -arch=amdgcn -mcpu=fiji -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+
+# VI: s_load_dword s1, s[2:3], 0xfc ; encoding: [0x41,0x00,0x02,0xc0,0xfc,0x00,0x00,0x00]
+0x41 0x00 0x02 0xc0 0xfc 0x00 0x00 0x00
+
+# VI: s_load_dword s1, s[2:3], 0xff ; encoding: [0x41,0x00,0x02,0xc0,0xff,0x00,0x00,0x00]
+0x41 0x00 0x02 0xc0 0xff 0x00 0x00 0x00
# VI: s_load_dword s1, s[2:3], 0x1 ; encoding: [0x41,0x00,0x02,0xc0,0x01,0x00,0x00,0x00]
0x41 0x00 0x02 0xc0 0x01 0x00 0x00 0x00
@@ -30,11 +36,41 @@
# VI: s_load_dwordx16 s[16:31], s[2:3], s4 ; encoding: [0x01,0x04,0x10,0xc0,0x04,0x00,0x00,0x00]
0x01 0x04 0x10 0xc0 0x04 0x00 0x00 0x00
+# VI: s_buffer_load_dword s1, s[4:7], 0x1 ; encoding: [0x42,0x00,0x22,0xc0,0x01,0x00,0x00,0x00]
+0x42 0x00 0x22 0xc0 0x01 0x00 0x00 0x00
+
+# VI: s_buffer_load_dword s1, s[4:7], s4 ; encoding: [0x42,0x00,0x20,0xc0,0x04,0x00,0x00,0x00]
+0x42 0x00 0x20 0xc0 0x04 0x00 0x00 0x00
+
+# VI: s_buffer_load_dwordx2 s[8:9], s[4:7], 0x1 ; encoding: [0x02,0x02,0x26,0xc0,0x01,0x00,0x00,0x00]
+0x02 0x02 0x26 0xc0 0x01 0x00 0x00 0x00
+
+# VI: s_buffer_load_dwordx2 s[8:9], s[4:7], s4 ; encoding: [0x02,0x02,0x24,0xc0,0x04,0x00,0x00,0x00]
+0x02 0x02 0x24 0xc0 0x04 0x00 0x00 0x00
+
+# VI: s_buffer_load_dwordx4 s[8:11], s[4:7], 0x1 ; encoding: [0x02,0x02,0x2a,0xc0,0x01,0x00,0x00,0x00]
+0x02 0x02 0x2a 0xc0 0x01 0x00 0x00 0x00
+
+# VI: s_buffer_load_dwordx4 s[8:11], s[4:7], s4 ; encoding: [0x02,0x02,0x28,0xc0,0x04,0x00,0x00,0x00]
+0x02 0x02 0x28 0xc0 0x04 0x00 0x00 0x00
+
+# VI: s_buffer_load_dwordx8 s[8:15], s[4:7], 0x1 ; encoding: [0x02,0x02,0x2e,0xc0,0x01,0x00,0x00,0x00]
+0x02 0x02 0x2e 0xc0 0x01 0x00 0x00 0x00
+
+# VI: s_buffer_load_dwordx8 s[8:15], s[4:7], s4 ; encoding: [0x02,0x02,0x2c,0xc0,0x04,0x00,0x00,0x00]
+0x02 0x02 0x2c 0xc0 0x04 0x00 0x00 0x00
+
+# VI: s_buffer_load_dwordx16 s[16:31], s[4:7], 0x1 ; encoding: [0x02,0x04,0x32,0xc0,0x01,0x00,0x00,0x00]
+0x02 0x04 0x32 0xc0 0x01 0x00 0x00 0x00
+
+# VI: s_buffer_load_dwordx16 s[16:31], s[4:7], s4 ; encoding: [0x02,0x04,0x30,0xc0,0x04,0x00,0x00,0x00]
+0x02 0x04 0x30 0xc0 0x04 0x00 0x00 0x00
+
# VI: s_dcache_inv ; encoding: [0x00,0x00,0x80,0xc0,0x00,0x00,0x00,0x00]
0x00 0x00 0x80 0xc0 0x00 0x00 0x00 0x00
# VI: s_dcache_inv_vol ; encoding: [0x00,0x00,0x88,0xc0,0x00,0x00,0x00,0x00]
0x00 0x00 0x88 0xc0 0x00 0x00 0x00 0x00
-# VI: s_memtime s[0:1] ; encoding: [0x00,0x00,0x90,0xc0,0x00,0x00,0x00,0x00]
-0x00 0x00 0x90 0xc0 0x00 0x00 0x00 0x00
+# VI: s_memtime s[4:5] ; encoding: [0x00,0x01,0x90,0xc0,0x00,0x00,0x00,0x00]
+0x00 0x01 0x90 0xc0 0x00 0x00 0x00 0x00
Added: llvm/trunk/test/MC/Disassembler/AMDGPU/sop1_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/sop1_vi.txt?rev=263729&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/sop1_vi.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/sop1_vi.txt Thu Mar 17 12:56:33 2016
@@ -0,0 +1,172 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+
+# VI: s_mov_b32 s1, s2 ; encoding: [0x02,0x00,0x81,0xbe]
+0x02 0x00 0x81 0xbe
+
+# VI: s_mov_b32 s1, 1 ; encoding: [0x81,0x00,0x81,0xbe]
+0x81 0x00 0x81 0xbe
+
+# VI: s_mov_b32 s1, 0x64 ; encoding: [0xff,0x00,0x81,0xbe,0x64,0x00,0x00,0x00]
+0xff 0x00 0x81 0xbe 0x64 0x00 0x00 0x00
+
+# VI: s_mov_b32 s1, 0x80000000 ; encoding: [0xff,0x00,0x81,0xbe,0x00,0x00,0x00,0x80]
+0xff 0x00 0x81 0xbe 0x00 0x00 0x00 0x80
+
+# VI: s_mov_b32 s0, 0xfe5163ab ; encoding: [0xff,0x00,0x80,0xbe,0xab,0x63,0x51,0xfe]
+0xff 0x00 0x80 0xbe 0xab 0x63 0x51 0xfe
+
+# VI: s_mov_b64 s[2:3], s[4:5] ; encoding: [0x04,0x01,0x82,0xbe]
+0x04 0x01 0x82 0xbe
+
+# FIXME: s_mov_b64 s[2:3], -1 ; encoding: [0xc1,0x01,0x82,0xbe]
+0xc1 0x01 0x82 0xbe
+
+# VI: s_mov_b64 s[2:3], 0xffffffff ; encoding: [0xff,0x01,0x82,0xbe,0xff,0xff,0xff,0xff]
+0xff 0x01 0x82 0xbe 0xff 0xff 0xff 0xff
+
+# VI: s_mov_b64 s[0:1], 0x80000000 ; encoding: [0xff,0x01,0x80,0xbe,0x00,0x00,0x00,0x80]
+0xff 0x01 0x80 0xbe 0x00 0x00 0x00 0x80
+
+# VI: s_cmov_b32 s1, 0xc8 ; encoding: [0xff,0x02,0x81,0xbe,0xc8,0x00,0x00,0x00]
+0xff 0x02 0x81 0xbe 0xc8 0x00 0x00 0x00
+
+# VI: s_cmov_b32 s1, 1.0 ; encoding: [0xf2,0x02,0x81,0xbe]
+0xf2 0x02 0x81 0xbe
+
+# VI: s_cmov_b32 s1, s2 ; encoding: [0x02,0x02,0x81,0xbe]
+0x02 0x02 0x81 0xbe
+
+# VI: s_cmov_b64 s[2:3], s[4:5] ; encoding: [0x04,0x03,0x82,0xbe]
+0x04 0x03 0x82 0xbe
+
+# VI: s_not_b32 s1, s2 ; encoding: [0x02,0x04,0x81,0xbe]
+0x02 0x04 0x81 0xbe
+
+# VI: s_not_b64 s[2:3], s[4:5] ; encoding: [0x04,0x05,0x82,0xbe]
+0x04 0x05 0x82 0xbe
+
+# VI: s_wqm_b32 s1, s2 ; encoding: [0x02,0x06,0x81,0xbe]
+0x02 0x06 0x81 0xbe
+
+# VI: s_wqm_b64 s[2:3], s[4:5] ; encoding: [0x04,0x07,0x82,0xbe]
+0x04 0x07 0x82 0xbe
+
+# VI: s_brev_b32 s1, s2 ; encoding: [0x02,0x08,0x81,0xbe]
+0x02 0x08 0x81 0xbe
+
+# VI: s_brev_b64 s[2:3], s[4:5] ; encoding: [0x04,0x09,0x82,0xbe]
+0x04 0x09 0x82 0xbe
+
+# VI: s_bcnt0_i32_b32 s1, s2 ; encoding: [0x02,0x0a,0x81,0xbe]
+0x02 0x0a 0x81 0xbe
+
+# VI: s_bcnt0_i32_b64 s1, s[2:3] ; encoding: [0x02,0x0b,0x81,0xbe]
+0x02 0x0b 0x81 0xbe
+
+# VI: s_bcnt1_i32_b32 s1, s2 ; encoding: [0x02,0x0c,0x81,0xbe]
+0x02 0x0c 0x81 0xbe
+
+# VI: s_bcnt1_i32_b64 s1, s[2:3] ; encoding: [0x02,0x0d,0x81,0xbe]
+0x02 0x0d 0x81 0xbe
+
+# VI: s_ff0_i32_b32 s1, s2 ; encoding: [0x02,0x0e,0x81,0xbe]
+0x02 0x0e 0x81 0xbe
+
+# VI: s_ff0_i32_b64 s1, s[2:3] ; encoding: [0x02,0x0f,0x81,0xbe]
+0x02 0x0f 0x81 0xbe
+
+# VI: s_ff1_i32_b32 s1, s2 ; encoding: [0x02,0x10,0x81,0xbe]
+0x02 0x10 0x81 0xbe
+
+# VI: s_ff1_i32_b64 s1, s[2:3] ; encoding: [0x02,0x11,0x81,0xbe]
+0x02 0x11 0x81 0xbe
+
+# VI: s_flbit_i32_b32 s1, s2 ; encoding: [0x02,0x12,0x81,0xbe]
+0x02 0x12 0x81 0xbe
+
+# VI: s_flbit_i32_b64 s1, s[2:3] ; encoding: [0x02,0x13,0x81,0xbe]
+0x02 0x13 0x81 0xbe
+
+# VI: s_flbit_i32 s1, s2 ; encoding: [0x02,0x14,0x81,0xbe]
+0x02 0x14 0x81 0xbe
+
+# VI: s_flbit_i32_i64 s1, s[2:3] ; encoding: [0x02,0x15,0x81,0xbe]
+0x02 0x15 0x81 0xbe
+
+# VI: s_sext_i32_i8 s1, s2 ; encoding: [0x02,0x16,0x81,0xbe]
+0x02 0x16 0x81 0xbe
+
+# VI: s_sext_i32_i16 s1, s2 ; encoding: [0x02,0x17,0x81,0xbe]
+0x02 0x17 0x81 0xbe
+
+# VI: s_bitset0_b32 s1, s2 ; encoding: [0x02,0x18,0x81,0xbe]
+0x02 0x18 0x81 0xbe
+
+# VI: s_bitset0_b64 s[2:3], s4 ; encoding: [0x04,0x19,0x82,0xbe]
+0x04 0x19 0x82 0xbe
+
+# VI: s_bitset1_b32 s1, s2 ; encoding: [0x02,0x1a,0x81,0xbe]
+0x02 0x1a 0x81 0xbe
+
+# VI: s_bitset1_b64 s[2:3], s4 ; encoding: [0x04,0x1b,0x82,0xbe]
+0x04 0x1b 0x82 0xbe
+
+# VI: s_getpc_b64 s[2:3] ; encoding: [0x00,0x1c,0x82,0xbe]
+0x00 0x1c 0x82 0xbe
+
+# VI: s_setpc_b64 s[4:5] ; encoding: [0x04,0x1d,0x80,0xbe]
+0x04 0x1d 0x80 0xbe
+
+# VI: s_swappc_b64 s[2:3], s[4:5] ; encoding: [0x04,0x1e,0x82,0xbe]
+0x04 0x1e 0x82 0xbe
+
+# VI: s_rfe_b64 s[4:5] ; encoding: [0x04,0x1f,0x80,0xbe]
+0x04 0x1f 0x80 0xbe
+
+# VI: s_and_saveexec_b64 s[2:3], s[4:5] ; encoding: [0x04,0x20,0x82,0xbe]
+0x04 0x20 0x82 0xbe
+
+# VI: s_or_saveexec_b64 s[2:3], s[4:5] ; encoding: [0x04,0x21,0x82,0xbe]
+0x04 0x21 0x82 0xbe
+
+# VI: s_xor_saveexec_b64 s[2:3], s[4:5] ; encoding: [0x04,0x22,0x82,0xbe]
+0x04 0x22 0x82 0xbe
+
+# VI: s_andn2_saveexec_b64 s[2:3], s[4:5] ; encoding: [0x04,0x23,0x82,0xbe]
+0x04 0x23 0x82 0xbe
+
+# VI: s_orn2_saveexec_b64 s[2:3], s[4:5] ; encoding: [0x04,0x24,0x82,0xbe]
+0x04 0x24 0x82 0xbe
+
+# VI: s_nand_saveexec_b64 s[2:3], s[4:5] ; encoding: [0x04,0x25,0x82,0xbe]
+0x04 0x25 0x82 0xbe
+
+# VI: s_nor_saveexec_b64 s[2:3], s[4:5] ; encoding: [0x04,0x26,0x82,0xbe]
+0x04 0x26 0x82 0xbe
+
+# VI: s_xnor_saveexec_b64 s[2:3], s[4:5] ; encoding: [0x04,0x27,0x82,0xbe]
+0x04 0x27 0x82 0xbe
+
+# VI: s_quadmask_b32 s1, s2 ; encoding: [0x02,0x28,0x81,0xbe]
+0x02 0x28 0x81 0xbe
+
+# VI: s_quadmask_b64 s[2:3], s[4:5] ; encoding: [0x04,0x29,0x82,0xbe]
+0x04 0x29 0x82 0xbe
+
+# VI: s_movrels_b32 s1, s2 ; encoding: [0x02,0x2a,0x81,0xbe]
+0x02 0x2a 0x81 0xbe
+
+# VI: s_movrels_b64 s[2:3], s[4:5] ; encoding: [0x04,0x2b,0x82,0xbe]
+0x04 0x2b 0x82 0xbe
+
+# VI: s_movreld_b32 s1, s2 ; encoding: [0x02,0x2c,0x81,0xbe]
+0x02 0x2c 0x81 0xbe
+
+# VI: s_movreld_b64 s[2:3], s[4:5] ; encoding: [0x04,0x2d,0x82,0xbe]
+0x04 0x2d 0x82 0xbe
+
+# VI: s_cbranch_join s[4:5] ; encoding: [0x04,0x2e,0x80,0xbe]
+0x04 0x2e 0x80 0xbe
+
+# VI: s_abs_i32 s1, s2 ; encoding: [0x02,0x30,0x81,0xbe]
+0x02 0x30 0x81 0xbe
Added: llvm/trunk/test/MC/Disassembler/AMDGPU/sop2_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/sop2_vi.txt?rev=263729&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/sop2_vi.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/sop2_vi.txt Thu Mar 17 12:56:33 2016
@@ -0,0 +1,94 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+
+# VI: s_and_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x86]
+0x04 0x06 0x02 0x86
+
+# VI: s_and_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x86]
+0x04 0x06 0x82 0x86
+
+# VI: s_or_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x87]
+0x04 0x06 0x02 0x87
+
+# VI: s_or_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x87]
+0x04 0x06 0x82 0x87
+
+# VI: s_xor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x88]
+0x04 0x06 0x02 0x88
+
+# VI: s_xor_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x88]
+0x04 0x06 0x82 0x88
+
+# VI: s_andn2_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x89]
+0x04 0x06 0x02 0x89
+
+# VI: s_andn2_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x89]
+0x04 0x06 0x82 0x89
+
+# VI: s_orn2_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8a]
+0x04 0x06 0x02 0x8a
+
+# VI: s_orn2_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8a]
+0x04 0x06 0x82 0x8a
+
+# VI: s_nand_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8b]
+0x04 0x06 0x02 0x8b
+
+# VI: s_nand_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8b]
+0x04 0x06 0x82 0x8b
+
+# VI: s_nor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8c]
+0x04 0x06 0x02 0x8c
+
+# VI: s_nor_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8c]
+0x04 0x06 0x82 0x8c
+
+# VI: s_xnor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8d]
+0x04 0x06 0x02 0x8d
+
+# VI: s_xnor_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8d]
+0x04 0x06 0x82 0x8d
+
+# VI: s_lshl_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8e]
+0x04 0x06 0x02 0x8e
+
+# VI: s_lshl_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x8e]
+0x04 0x06 0x82 0x8e
+
+# VI: s_lshr_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8f]
+0x04 0x06 0x02 0x8f
+
+# VI: s_lshr_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x8f]
+0x04 0x06 0x82 0x8f
+
+# VI: s_ashr_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x90]
+0x04 0x06 0x02 0x90
+
+# VI: s_ashr_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x90]
+0x04 0x06 0x82 0x90
+
+# VI: s_bfm_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x91]
+0x04 0x06 0x02 0x91
+
+# VI: s_bfm_b64 s[2:3], s4, s6 ; encoding: [0x04,0x06,0x82,0x91]
+0x04 0x06 0x82 0x91
+
+# VI: s_mul_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x92]
+0x04 0x06 0x02 0x92
+
+# VI: s_bfe_u32 s2, s4, s6 ; encoding: [0x04,0x06,0x82,0x92]
+0x04 0x06 0x82 0x92
+
+# VI: s_bfe_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x93]
+0x04 0x06 0x02 0x93
+
+# VI: s_bfe_u64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x93]
+0x04 0x06 0x82 0x93
+
+# VI: s_bfe_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x02,0x94]
+0x04 0x06 0x02 0x94
+
+# VI: s_cbranch_g_fork s[4:5], s[6:7] ; encoding: [0x04,0x06,0x80,0x94]
+0x04 0x06 0x80 0x94
+
+# VI: s_absdiff_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x95]
+0x04 0x06 0x02 0x95
Added: llvm/trunk/test/MC/Disassembler/AMDGPU/sopc_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/sopc_vi.txt?rev=263729&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/sopc_vi.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/sopc_vi.txt Thu Mar 17 12:56:33 2016
@@ -0,0 +1,52 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GCN
+
+# GCN: s_cmp_eq_i32 s1, s2 ; encoding: [0x01,0x02,0x00,0xbf]
+0x01 0x02 0x00 0xbf
+
+# GCN: s_cmp_lg_i32 s1, s2 ; encoding: [0x01,0x02,0x01,0xbf]
+0x01 0x02 0x01 0xbf
+
+# GCN: s_cmp_gt_i32 s1, s2 ; encoding: [0x01,0x02,0x02,0xbf]
+0x01 0x02 0x02 0xbf
+
+# GCN: s_cmp_ge_i32 s1, s2 ; encoding: [0x01,0x02,0x03,0xbf]
+0x01 0x02 0x03 0xbf
+
+# GCN: s_cmp_lt_i32 s1, s2 ; encoding: [0x01,0x02,0x04,0xbf]
+0x01 0x02 0x04 0xbf
+
+# GCN: s_cmp_le_i32 s1, s2 ; encoding: [0x01,0x02,0x05,0xbf]
+0x01 0x02 0x05 0xbf
+
+# GCN: s_cmp_eq_u32 s1, s2 ; encoding: [0x01,0x02,0x06,0xbf]
+0x01 0x02 0x06 0xbf
+
+# GCN: s_cmp_lg_u32 s1, s2 ; encoding: [0x01,0x02,0x07,0xbf]
+0x01 0x02 0x07 0xbf
+
+# GCN: s_cmp_gt_u32 s1, s2 ; encoding: [0x01,0x02,0x08,0xbf]
+0x01 0x02 0x08 0xbf
+
+# GCN: s_cmp_ge_u32 s1, s2 ; encoding: [0x01,0x02,0x09,0xbf]
+0x01 0x02 0x09 0xbf
+
+# GCN: s_cmp_lt_u32 s1, s2 ; encoding: [0x01,0x02,0x0a,0xbf]
+0x01 0x02 0x0a 0xbf
+
+# GCN: s_cmp_le_u32 s1, s2 ; encoding: [0x01,0x02,0x0b,0xbf]
+0x01 0x02 0x0b 0xbf
+
+# GCN: s_bitcmp0_b32 s1, s2 ; encoding: [0x01,0x02,0x0c,0xbf]
+0x01 0x02 0x0c 0xbf
+
+# GCN: s_bitcmp1_b32 s1, s2 ; encoding: [0x01,0x02,0x0d,0xbf]
+0x01 0x02 0x0d 0xbf
+
+# GCN: s_bitcmp0_b64 s[2:3], s4 ; encoding: [0x02,0x04,0x0e,0xbf]
+0x02 0x04 0x0e 0xbf
+
+# GCN: s_bitcmp1_b64 s[2:3], s4 ; encoding: [0x02,0x04,0x0f,0xbf]
+0x02 0x04 0x0f 0xbf
+
+# GCN: s_setvskip s3, s5 ; encoding: [0x03,0x05,0x10,0xbf]
+0x03 0x05 0x10 0xbf
Added: llvm/trunk/test/MC/Disassembler/AMDGPU/sopk_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/sopk_vi.txt?rev=263729&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/sopk_vi.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/sopk_vi.txt Thu Mar 17 12:56:33 2016
@@ -0,0 +1,58 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+
+# VI: s_cmovk_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb0]
+0x06 0x00 0x82 0xb0
+
+# VI: s_cmpk_eq_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb1]
+0x06 0x00 0x02 0xb1
+
+# VI: s_cmpk_lg_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb1]
+0x06 0x00 0x82 0xb1
+
+# VI: s_cmpk_gt_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb2]
+0x06 0x00 0x02 0xb2
+
+# VI: s_cmpk_ge_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb2]
+0x06 0x00 0x82 0xb2
+
+# VI: s_cmpk_lt_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb3]
+0x06 0x00 0x02 0xb3
+
+# VI: s_cmpk_le_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb3]
+0x06 0x00 0x82 0xb3
+
+# VI: s_cmpk_eq_u32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb4]
+0x06 0x00 0x02 0xb4
+
+# VI: s_cmpk_lg_u32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb4]
+0x06 0x00 0x82 0xb4
+
+# VI: s_cmpk_gt_u32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb5]
+0x06 0x00 0x02 0xb5
+
+# VI: s_cmpk_ge_u32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb5]
+0x06 0x00 0x82 0xb5
+
+# VI: s_cmpk_lt_u32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb6]
+0x06 0x00 0x02 0xb6
+
+# VI: s_cmpk_le_u32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb6]
+0x06 0x00 0x82 0xb6
+
+# VI: s_addk_i32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb7]
+0x06 0x00 0x02 0xb7
+
+# VI: s_mulk_i32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb7]
+0x06 0x00 0x82 0xb7
+
+# VI: s_cbranch_i_fork s[2:3], 0x6 ; encoding: [0x06,0x00,0x02,0xb8]
+0x06 0x00 0x02 0xb8
+
+# VI: s_getreg_b32 s2, 0x6 ; encoding: [0x06,0x00,0x82,0xb8]
+0x06 0x00 0x82 0xb8
+
+# VI: s_setreg_b32 s2, 0x6 ; encoding: [0x06,0x00,0x02,0xb9]
+0x06 0x00 0x02 0xb9
+
+# VI: s_setreg_imm32_b32 0xff, 0x6 ; encoding: [0x06,0x00,0x00,0xba,0xff,0x00,0x00,0x00]
+0x06 0x00 0x00 0xba 0xff 0x00 0x00 0x00
Added: llvm/trunk/test/MC/Disassembler/AMDGPU/sopp_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/sopp_vi.txt?rev=263729&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/sopp_vi.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/sopp_vi.txt Thu Mar 17 12:56:33 2016
@@ -0,0 +1,97 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GCN
+
+# GCN: s_nop 0 ; encoding: [0x00,0x00,0x80,0xbf]
+0x00 0x00 0x80 0xbf
+
+# GCN: s_nop 0xffff ; encoding: [0xff,0xff,0x80,0xbf]
+0xff 0xff 0x80 0xbf
+
+# GCN: s_nop 1 ; encoding: [0x01,0x00,0x80,0xbf]
+0x01 0x00 0x80 0xbf
+
+# GCN: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
+0x00 0x00 0x81 0xbf
+
+# GCN: s_branch 2 ; encoding: [0x02,0x00,0x82,0xbf]
+0x02 0x00 0x82 0xbf
+
+# GCN: s_cbranch_scc0 3 ; encoding: [0x03,0x00,0x84,0xbf]
+0x03 0x00 0x84 0xbf
+
+# GCN: s_cbranch_scc1 4 ; encoding: [0x04,0x00,0x85,0xbf]
+0x04 0x00 0x85 0xbf
+
+# GCN: s_cbranch_vccz 5 ; encoding: [0x05,0x00,0x86,0xbf]
+0x05 0x00 0x86 0xbf
+
+# GCN: s_cbranch_vccnz 6 ; encoding: [0x06,0x00,0x87,0xbf]
+0x06 0x00 0x87 0xbf
+
+# GCN: s_cbranch_execz 7 ; encoding: [0x07,0x00,0x88,0xbf]
+0x07 0x00 0x88 0xbf
+
+# GCN: s_cbranch_execnz 8 ; encoding: [0x08,0x00,0x89,0xbf]
+0x08 0x00 0x89 0xbf
+
+# GCN: s_barrier ; encoding: [0x00,0x00,0x8a,0xbf]
+0x00 0x00 0x8a 0xbf
+
+# GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; encoding: [0x00,0x00,0x8c,0xbf]
+0x00 0x00 0x8c 0xbf
+
+# GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; encoding: [0x00,0x00,0x8c,0xbf]
+0x00 0x00 0x8c 0xbf
+
+# GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; encoding: [0x00,0x00,0x8c,0xbf]
+0x00 0x00 0x8c 0xbf
+
+# GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; encoding: [0x00,0x00,0x8c,0xbf]
+0x00 0x00 0x8c 0xbf
+
+# GCN: s_waitcnt vmcnt(1) ; encoding: [0x71,0x0f,0x8c,0xbf]
+0x71 0x0f 0x8c 0xbf
+
+# GCN: s_waitcnt vmcnt(9) ; encoding: [0x79,0x0f,0x8c,0xbf]
+0x79 0x0f 0x8c 0xbf
+
+# GCN: s_waitcnt expcnt(2) ; encoding: [0x2f,0x0f,0x8c,0xbf]
+0x2f 0x0f 0x8c 0xbf
+
+# GCN: s_waitcnt lgkmcnt(3) ; encoding: [0x7f,0x03,0x8c,0xbf]
+0x7f 0x03 0x8c 0xbf
+
+# GCN: s_waitcnt lgkmcnt(9) ; encoding: [0x7f,0x09,0x8c,0xbf]
+0x7f 0x09 0x8c 0xbf
+
+# GCN: s_waitcnt vmcnt(0) expcnt(0) ; encoding: [0x00,0x0f,0x8c,0xbf]
+0x00 0x0f 0x8c 0xbf
+
+# GCN: s_sethalt 9 ; encoding: [0x09,0x00,0x8d,0xbf]
+0x09 0x00 0x8d 0xbf
+
+# GCN: s_sleep 10 ; encoding: [0x0a,0x00,0x8e,0xbf]
+0x0a 0x00 0x8e 0xbf
+
+# GCN: s_setprio 1 ; encoding: [0x01,0x00,0x8f,0xbf]
+0x01 0x00 0x8f 0xbf
+
+# GCN: s_sendmsg Gs(nop), [m0] ; encoding: [0x02,0x00,0x90,0xbf]
+0x02 0x00 0x90 0xbf
+
+# GCN: s_sendmsghalt 3 ; encoding: [0x03,0x00,0x91,0xbf]
+0x03 0x00 0x91 0xbf
+
+# GCN: s_trap 4 ; encoding: [0x04,0x00,0x92,0xbf]
+0x04 0x00 0x92 0xbf
+
+# GCN: s_icache_inv ; encoding: [0x00,0x00,0x93,0xbf]
+0x00 0x00 0x93 0xbf
+
+# GCN: s_incperflevel 5 ; encoding: [0x05,0x00,0x94,0xbf]
+0x05 0x00 0x94 0xbf
+
+# GCN: s_decperflevel 6 ; encoding: [0x06,0x00,0x95,0xbf]
+0x06 0x00 0x95 0xbf
+
+# GCN: s_ttracedata ; encoding: [0x00,0x00,0x96,0xbf]
+0x00 0x00 0x96 0xbf
Added: llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt?rev=263729&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/vop1_vi.txt Thu Mar 17 12:56:33 2016
@@ -0,0 +1,151 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+
+# VI: v_clrexcp ; encoding: [0x00,0x6a,0x00,0x7e]
+0x00 0x6a 0x00 0x7e
+
+# VI: v_fract_f32_e32 v1, v2 ; encoding: [0x02,0x37,0x02,0x7e]
+0x02 0x37 0x02 0x7e
+
+# VI: v_trunc_f32_e32 v1, v2 ; encoding: [0x02,0x39,0x02,0x7e]
+0x02 0x39 0x02 0x7e
+
+# VI: v_ceil_f32_e32 v1, v2 ; encoding: [0x02,0x3b,0x02,0x7e]
+0x02 0x3b 0x02 0x7e
+
+# VI: v_rndne_f32_e32 v1, v2 ; encoding: [0x02,0x3d,0x02,0x7e]
+0x02 0x3d 0x02 0x7e
+
+# VI: v_floor_f32_e32 v1, v2 ; encoding: [0x02,0x3f,0x02,0x7e]
+0x02 0x3f 0x02 0x7e
+
+# VI: v_exp_f32_e32 v1, v2 ; encoding: [0x02,0x41,0x02,0x7e]
+0x02 0x41 0x02 0x7e
+
+# VI: v_log_f32_e32 v1, v2 ; encoding: [0x02,0x43,0x02,0x7e]
+0x02 0x43 0x02 0x7e
+
+# VI: v_rcp_f32_e32 v1, v2 ; encoding: [0x02,0x45,0x02,0x7e]
+0x02 0x45 0x02 0x7e
+
+# VI: v_rcp_iflag_f32_e32 v1, v2 ; encoding: [0x02,0x47,0x02,0x7e]
+0x02 0x47 0x02 0x7e
+
+# VI: v_rsq_f32_e32 v1, v2 ; encoding: [0x02,0x49,0x02,0x7e]
+0x02 0x49 0x02 0x7e
+
+# VI: v_rcp_f64_e32 v[1:2], v[2:3] ; encoding: [0x02,0x4b,0x02,0x7e]
+0x02 0x4b 0x02 0x7e
+
+# VI: v_rsq_f64_e32 v[1:2], v[2:3] ; encoding: [0x02,0x4d,0x02,0x7e]
+0x02 0x4d 0x02 0x7e
+
+# VI: v_sqrt_f32_e32 v1, v2 ; encoding: [0x02,0x4f,0x02,0x7e]
+0x02 0x4f 0x02 0x7e
+
+# VI: v_sqrt_f64_e32 v[1:2], v[2:3] ; encoding: [0x02,0x51,0x02,0x7e]
+0x02 0x51 0x02 0x7e
+
+# VI: v_sin_f32_e32 v1, v2 ; encoding: [0x02,0x53,0x02,0x7e]
+0x02 0x53 0x02 0x7e
+
+# VI: v_cos_f32_e32 v1, v2 ; encoding: [0x02,0x55,0x02,0x7e]
+0x02 0x55 0x02 0x7e
+
+# VI: v_not_b32_e32 v1, v2 ; encoding: [0x02,0x57,0x02,0x7e]
+0x02 0x57 0x02 0x7e
+
+# VI: v_bfrev_b32_e32 v1, v2 ; encoding: [0x02,0x59,0x02,0x7e]
+0x02 0x59 0x02 0x7e
+
+# VI: v_ffbh_u32_e32 v1, v2 ; encoding: [0x02,0x5b,0x02,0x7e]
+0x02 0x5b 0x02 0x7e
+
+# VI: v_ffbl_b32_e32 v1, v2 ; encoding: [0x02,0x5d,0x02,0x7e]
+0x02 0x5d 0x02 0x7e
+
+# VI: v_ffbh_i32_e32 v1, v2 ; encoding: [0x02,0x5f,0x02,0x7e]
+0x02 0x5f 0x02 0x7e
+
+# VI: v_frexp_exp_i32_f64_e32 v1, v[2:3] ; encoding: [0x02,0x61,0x02,0x7e]
+0x02 0x61 0x02 0x7e
+
+# VI: v_fract_f64_e32 v[1:2], v[2:3] ; encoding: [0x02,0x65,0x02,0x7e]
+0x02 0x65 0x02 0x7e
+
+# VI: v_frexp_exp_i32_f32_e32 v1, v2 ; encoding: [0x02,0x67,0x02,0x7e]
+0x02 0x67 0x02 0x7e
+
+# VI: v_frexp_mant_f32_e32 v1, v2 ; encoding: [0x02,0x69,0x02,0x7e]
+0x02 0x69 0x02 0x7e
+
+# VI: v_clrexcp ; encoding: [0x00,0x6a,0x00,0x7e]
+0x00 0x6a 0x00 0x7e
+
+# VI: v_movreld_b32_e32 v1, v2 ; encoding: [0x02,0x6d,0x02,0x7e]
+0x02 0x6d 0x02 0x7e
+
+# VI: v_movrels_b32_e32 v1, v2 ; encoding: [0x02,0x6f,0x02,0x7e]
+0x02 0x6f 0x02 0x7e
+
+# VI: v_movrelsd_b32_e32 v1, v2 ; encoding: [0x02,0x71,0x02,0x7e]
+0x02 0x71 0x02 0x7e
+
+# VI: v_log_legacy_f32_e32 v1, v2 ; encoding: [0x02,0x99,0x02,0x7e]
+0x02 0x99 0x02 0x7e
+
+# VI: v_exp_legacy_f32_e32 v1, v2 ; encoding: [0x02,0x97,0x02,0x7e]
+0x02 0x97 0x02 0x7e
+
+# VI: v_cvt_f16_u16_e32 v1, v2 ; encoding: [0x02,0x73,0x02,0x7e]
+0x02 0x73 0x02 0x7e
+
+# VI: v_cvt_f16_i16_e32 v1, v2 ; encoding: [0x02,0x75,0x02,0x7e]
+0x02 0x75 0x02 0x7e
+
+# VI: v_cvt_u16_f16_e32 v1, v2 ; encoding: [0x02,0x77,0x02,0x7e]
+0x02 0x77 0x02 0x7e
+
+# VI: v_cvt_i16_f16_e32 v1, v2 ; encoding: [0x02,0x79,0x02,0x7e]
+0x02 0x79 0x02 0x7e
+
+# VI: v_rcp_f16_e32 v1, v2 ; encoding: [0x02,0x7b,0x02,0x7e]
+0x02 0x7b 0x02 0x7e
+
+# VI: v_sqrt_f16_e32 v1, v2 ; encoding: [0x02,0x7d,0x02,0x7e]
+0x02 0x7d 0x02 0x7e
+
+# VI: v_rsq_f16_e32 v1, v2 ; encoding: [0x02,0x7f,0x02,0x7e]
+0x02 0x7f 0x02 0x7e
+
+# VI: v_log_f16_e32 v1, v2 ; encoding: [0x02,0x81,0x02,0x7e]
+0x02 0x81 0x02 0x7e
+
+# VI: v_exp_f16_e32 v1, v2 ; encoding: [0x02,0x83,0x02,0x7e]
+0x02 0x83 0x02 0x7e
+
+# VI: v_frexp_mant_f16_e32 v1, v2 ; encoding: [0x02,0x85,0x02,0x7e]
+0x02 0x85 0x02 0x7e
+
+# VI: v_frexp_exp_i16_f16_e32 v1, v2 ; encoding: [0x02,0x87,0x02,0x7e]
+0x02 0x87 0x02 0x7e
+
+# VI: v_floor_f16_e32 v1, v2 ; encoding: [0x02,0x89,0x02,0x7e]
+0x02 0x89 0x02 0x7e
+
+# VI: v_ceil_f16_e32 v1, v2 ; encoding: [0x02,0x8b,0x02,0x7e]
+0x02 0x8b 0x02 0x7e
+
+# VI: v_trunc_f16_e32 v1, v2 ; encoding: [0x02,0x8d,0x02,0x7e]
+0x02 0x8d 0x02 0x7e
+
+# VI: v_rndne_f16_e32 v1, v2 ; encoding: [0x02,0x8f,0x02,0x7e]
+0x02 0x8f 0x02 0x7e
+
+# VI: v_fract_f16_e32 v1, v2 ; encoding: [0x02,0x91,0x02,0x7e]
+0x02 0x91 0x02 0x7e
+
+# VI: v_sin_f16_e32 v1, v2 ; encoding: [0x02,0x93,0x02,0x7e]
+0x02 0x93 0x02 0x7e
+
+# VI: v_cos_f16_e32 v1, v2 ; encoding: [0x02,0x95,0x02,0x7e]
+0x02 0x95 0x02 0x7e
Added: llvm/trunk/test/MC/Disassembler/AMDGPU/vop2_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/vop2_vi.txt?rev=263729&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/vop2_vi.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/vop2_vi.txt Thu Mar 17 12:56:33 2016
@@ -0,0 +1,253 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+
+# FIXME: v_readlane_b32 s1, v2, s3 ; encoding: [0x01,0x00,0x89,0xd2,0x02,0x07,0x00,0x00]
+#0x01 0x00 0x89 0xd2 0x02 0x07 0x00 0x00
+
+# VI: v_writelane_b32 v1, s2, s3 ; encoding: [0x01,0x00,0x8a,0xd2,0x02,0x06,0x00,0x00]
+0x01 0x00 0x8a 0xd2 0x02 0x06 0x00 0x00
+
+# VI: v_add_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x02]
+0x02 0x07 0x02 0x02
+
+# VI: v_sub_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x04]
+0x02 0x07 0x02 0x04
+
+# VI: v_subrev_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x06]
+0x02 0x07 0x02 0x06
+
+# VI: v_mul_legacy_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x08]
+0x02 0x07 0x02 0x08
+
+# VI: v_mul_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x0a]
+0x02 0x07 0x02 0x0a
+
+# VI: v_mul_i32_i24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x0c]
+0x02 0x07 0x02 0x0c
+
+# VI: v_mul_hi_i32_i24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x0e]
+0x02 0x07 0x02 0x0e
+
+# VI: v_mul_u32_u24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x10]
+0x02 0x07 0x02 0x10
+
+# VI: v_mul_hi_u32_u24_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x12]
+0x02 0x07 0x02 0x12
+
+# VI: v_min_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x14]
+0x02 0x07 0x02 0x14
+
+# VI: v_max_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x16]
+0x02 0x07 0x02 0x16
+
+# VI: v_min_i32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x18]
+0x02 0x07 0x02 0x18
+
+# VI: v_max_i32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x1a]
+0x02 0x07 0x02 0x1a
+
+# VI: v_min_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x1c]
+0x02 0x07 0x02 0x1c
+
+# VI: v_max_u32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x1e]
+0x02 0x07 0x02 0x1e
+
+# VI: v_lshrrev_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x20]
+0x02 0x07 0x02 0x20
+
+# VI: v_ashrrev_i32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x22]
+0x02 0x07 0x02 0x22
+
+# VI: v_lshlrev_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x24]
+0x02 0x07 0x02 0x24
+
+# VI: v_and_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x26]
+0x02 0x07 0x02 0x26
+
+# VI: v_or_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x28]
+0x02 0x07 0x02 0x28
+
+# VI: v_xor_b32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x2a]
+0x02 0x07 0x02 0x2a
+
+# VI: v_bfm_b32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x93,0xd2,0x02,0x07,0x02,0x00]
+0x01 0x00 0x93 0xd2 0x02 0x07 0x02 0x00
+
+# VI: v_mac_f32_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x2c]
+0x02 0x07 0x02 0x2c
+
+# FIXME: v_madmk_f32_e32 v1, v2, 0x42800000, v3 ; encoding: [0x02,0x07,0x02,0x2e,0x00,0x00,0x80,0x42]
+#0x02 0x07 0x02 0x2e 0x00 0x00 0x80 0x42
+
+# FIXME: v_madak_f32_e32 v1, v2, v3, 0x42800000 ; encoding: [0x02,0x07,0x02,0x30,0x00,0x00,0x80,0x42]
+#0x02 0x07 0x02 0x30 0x00 0x00 0x80 0x42
+
+# VI: v_bcnt_u32_b32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x8b,0xd2,0x02,0x07,0x02,0x00]
+0x01 0x00 0x8b 0xd2 0x02 0x07 0x02 0x00
+
+# VI: v_mbcnt_lo_u32_b32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x8c,0xd2,0x02,0x07,0x02,0x00]
+0x01 0x00 0x8c 0xd2 0x02 0x07 0x02 0x00
+
+# VI: v_mbcnt_hi_u32_b32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x8d,0xd2,0x02,0x07,0x02,0x00]
+0x01 0x00 0x8d 0xd2 0x02 0x07 0x02 0x00
+
+# VI: v_add_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x32]
+0x02 0x07 0x02 0x32
+
+# VI: v_add_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x19,0xd1,0x02,0x07,0x02,0x00]
+0x01 0x00 0x19 0xd1 0x02 0x07 0x02 0x00
+
+# VI: v_add_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x19,0xd1,0x02,0x07,0x02,0x00]
+0x01 0x00 0x19 0xd1 0x02 0x07 0x02 0x00
+
+# VI: v_add_i32_e64 v1, vcc, v2, v3 ; encoding: [0x01,0x6a,0x19,0xd1,0x02,0x07,0x02,0x00]
+0x01 0x6a 0x19 0xd1 0x02 0x07 0x02 0x00
+
+# VI: v_add_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x32]
+0x02 0x07 0x02 0x32
+
+# VI: v_add_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x19,0xd1,0x02,0x07,0x02,0x00]
+0x01 0x00 0x19 0xd1 0x02 0x07 0x02 0x00
+
+# VI: v_sub_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x34]
+0x02 0x07 0x02 0x34
+
+# VI: v_sub_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x1a,0xd1,0x02,0x07,0x02,0x00]
+0x01 0x00 0x1a 0xd1 0x02 0x07 0x02 0x00
+
+# VI: v_sub_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x34]
+0x02 0x07 0x02 0x34
+
+# VI: v_sub_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x1a,0xd1,0x02,0x07,0x02,0x00]
+0x01 0x00 0x1a 0xd1 0x02 0x07 0x02 0x00
+
+# VI: v_subrev_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x36]
+0x02 0x07 0x02 0x36
+
+# VI: v_subrev_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x1b,0xd1,0x02,0x07,0x02,0x00]
+0x01 0x00 0x1b 0xd1 0x02 0x07 0x02 0x00
+
+# VI: v_subrev_i32_e32 v1, vcc, v2, v3 ; encoding: [0x02,0x07,0x02,0x36]
+0x02 0x07 0x02 0x36
+
+# VI: v_subrev_i32_e64 v1, s[0:1], v2, v3 ; encoding: [0x01,0x00,0x1b,0xd1,0x02,0x07,0x02,0x00]
+0x01 0x00 0x1b 0xd1 0x02 0x07 0x02 0x00
+
+# VI: v_addc_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x38]
+0x02 0x07 0x02 0x38
+
+# VI: v_addc_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x38]
+0x02 0x07 0x02 0x38
+
+# FIXME: v_addc_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0xaa,0x01]
+#0x01 0x00 0x1c 0xd1 0x02 0x07 0xaa 0x01
+
+# FIXME: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x00]
+#0x01 0x00 0x1c 0xd1 0x02 0x07 0x0a 0x00
+
+# FIXME: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x00]
+#0x01 0x00 0x1c 0xd1 0x02 0x07 0x0a 0x00
+
+# FIXME: v_addc_u32_e64 v1, s[0:1], v2, v3, -1 ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x06,0x03]
+#0x01 0x00 0x1c 0xd1 0x02 0x07 0x06 0x03
+
+# FIXME: v_addc_u32_e64 v1, vcc, v2, v3, -1 ; encoding: [0x01,0x6a,0x1c,0xd1,0x02,0x07,0x06,0x03]
+#0x01 0x6a 0x1c 0xd1 0x02 0x07 0x06 0x03
+
+# FIXME: v_addc_u32_e64 v1, vcc, v2, v3, vcc ; encoding: [0x01,0x6a,0x1c,0xd1,0x02,0x07,0xaa,0x01]
+#0x01 0x6a 0x1c 0xd1 0x02 0x07 0xaa 0x01
+
+# VI: v_subb_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x3a]
+0x02 0x07 0x02 0x3a
+
+# VI: v_subb_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x1d,0xd1,0x02,0x07,0xaa,0x01]
+0x01 0x00 0x1d 0xd1 0x02 0x07 0xaa 0x01
+
+# VI: v_subbrev_u32_e32 v1, vcc, v2, v3, vcc ; encoding: [0x02,0x07,0x02,0x3c]
+0x02 0x07 0x02 0x3c
+
+# VI: v_subbrev_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x1e,0xd1,0x02,0x07,0xaa,0x01]
+0x01 0x00 0x1e 0xd1 0x02 0x07 0xaa 0x01
+
+# VI: v_ldexp_f32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x88,0xd2,0x02,0x07,0x02,0x00]
+0x01 0x00 0x88 0xd2 0x02 0x07 0x02 0x00
+
+# VI: v_cvt_pkaccum_u8_f32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0xf0,0xd1,0x02,0x07,0x02,0x00]
+0x01 0x00 0xf0 0xd1 0x02 0x07 0x02 0x00
+
+# VI: v_cvt_pknorm_i16_f32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x94,0xd2,0x02,0x07,0x02,0x00]
+0x01 0x00 0x94 0xd2 0x02 0x07 0x02 0x00
+
+# VI: v_cvt_pknorm_u16_f32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x95,0xd2,0x02,0x07,0x02,0x00]
+0x01 0x00 0x95 0xd2 0x02 0x07 0x02 0x00
+
+# VI: v_cvt_pkrtz_f16_f32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x96,0xd2,0x02,0x07,0x02,0x00]
+0x01 0x00 0x96 0xd2 0x02 0x07 0x02 0x00
+
+# VI: v_cvt_pk_u16_u32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x97,0xd2,0x02,0x07,0x02,0x00]
+0x01 0x00 0x97 0xd2 0x02 0x07 0x02 0x00
+
+# VI: v_cvt_pk_i16_i32_e64 v1, v2, v3 ; encoding: [0x01,0x00,0x98,0xd2,0x02,0x07,0x02,0x00]
+0x01 0x00 0x98 0xd2 0x02 0x07 0x02 0x00
+
+# VI: v_add_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x3e]
+0x02 0x07 0x02 0x3e
+
+# VI: v_sub_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x40]
+0x02 0x07 0x02 0x40
+
+# VI: v_subrev_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x42]
+0x02 0x07 0x02 0x42
+
+# VI: v_mul_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x44]
+0x02 0x07 0x02 0x44
+
+# VI: v_mac_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x46]
+0x02 0x07 0x02 0x46
+
+# FIXME: v_madmk_f16_e32 v1, v2, 0x42800000, v3 ; encoding: [0x02,0x07,0x02,0x48,0x00,0x00,0x80,0x42]
+#0x02 0x07 0x02 0x48 0x00 0x00 0x80 0x42
+
+# FIXME: v_madak_f16_e32 v1, v2, v3, 0x42800000 ; encoding: [0x02,0x07,0x02,0x4a,0x00,0x00,0x80,0x42]
+#0x02 0x07 0x02 0x4a 0x00 0x00 0x80 0x42
+
+# VI: v_add_u16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x4c]
+0x02 0x07 0x02 0x4c
+
+# VI: v_sub_u16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x4e]
+0x02 0x07 0x02 0x4e
+
+# VI: v_subrev_u16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x50]
+0x02 0x07 0x02 0x50
+
+# VI: v_mul_lo_u16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x52]
+0x02 0x07 0x02 0x52
+
+# VI: v_lshlrev_b16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x54]
+0x02 0x07 0x02 0x54
+
+# VI: v_lshrrev_b16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x56]
+0x02 0x07 0x02 0x56
+
+# VI: v_ashrrev_b16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x58]
+0x02 0x07 0x02 0x58
+
+# VI: v_max_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x5a]
+0x02 0x07 0x02 0x5a
+
+# VI: v_min_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x5c]
+0x02 0x07 0x02 0x5c
+
+# VI: v_max_u16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x5e]
+0x02 0x07 0x02 0x5e
+
+# VI: v_max_i16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x60]
+0x02 0x07 0x02 0x60
+
+# VI: v_min_u16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x62]
+0x02 0x07 0x02 0x62
+
+# VI: v_min_i16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x64]
+0x02 0x07 0x02 0x64
+
+# VI: v_ldexp_f16_e32 v1, v2, v3 ; encoding: [0x02,0x07,0x02,0x66]
+0x02 0x07 0x02 0x66
Added: llvm/trunk/test/MC/Disassembler/AMDGPU/vop3_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/vop3_vi.txt?rev=263729&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/vop3_vi.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/vop3_vi.txt Thu Mar 17 12:56:33 2016
@@ -0,0 +1,214 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=tonga -disassemble -show-encoding < %s | FileCheck %s -check-prefix=VI
+
+# VI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x40]
+0x02 0x00 0x41 0xd0 0x04 0x0d 0x02 0x40
+
+# VI: v_cmp_lt_f32_e64 vcc, v4, v6 ; encoding: [0x6a,0x00,0x41,0xd0,0x04,0x0d,0x02,0x00]
+0x6a 0x00 0x41 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_cmp_lt_f32_e64 s[2:3], -v4, v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x20]
+0x02 0x00 0x41 0xd0 0x04 0x0d 0x02 0x20
+
+# VI: v_cmp_lt_f32_e64 s[2:3], v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x40]
+0x02 0x00 0x41 0xd0 0x04 0x0d 0x02 0x40
+
+# VI: v_cmp_lt_f32_e64 s[2:3], -v4, -v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x60]
+0x02 0x00 0x41 0xd0 0x04 0x0d 0x02 0x60
+
+# VI: v_cmp_lt_f32_e64 s[2:3], |v4|, v6 ; encoding: [0x02,0x01,0x41,0xd0,0x04,0x0d,0x02,0x00]
+0x02 0x01 0x41 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_cmp_lt_f32_e64 s[2:3], v4, |v6| ; encoding: [0x02,0x02,0x41,0xd0,0x04,0x0d,0x02,0x00]
+0x02 0x02 0x41 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_cmp_lt_f32_e64 s[2:3], |v4|, |v6| ; encoding: [0x02,0x03,0x41,0xd0,0x04,0x0d,0x02,0x00]
+0x02 0x03 0x41 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_cmp_lt_f32_e64 s[2:3], -|v4|, v6 ; encoding: [0x02,0x01,0x41,0xd0,0x04,0x0d,0x02,0x20]
+0x02 0x01 0x41 0xd0 0x04 0x0d 0x02 0x20
+
+# VI: v_cmp_lt_f32_e64 s[2:3], -|v4|, v6 ; encoding: [0x02,0x01,0x41,0xd0,0x04,0x0d,0x02,0x20]
+0x02 0x01 0x41 0xd0 0x04 0x0d 0x02 0x20
+
+# VI: v_cmp_lt_f32_e64 s[2:3], v4, -|v6| ; encoding: [0x02,0x02,0x41,0xd0,0x04,0x0d,0x02,0x40]
+0x02 0x02 0x41 0xd0 0x04 0x0d 0x02 0x40
+
+# VI: v_cmp_lt_f32_e64 s[2:3], v4, -|v6| ; encoding: [0x02,0x02,0x41,0xd0,0x04,0x0d,0x02,0x40]
+0x02 0x02 0x41 0xd0 0x04 0x0d 0x02 0x40
+
+# VI: v_cmp_lt_f32_e64 s[2:3], -|v4|, -|v6| ; encoding: [0x02,0x03,0x41,0xd0,0x04,0x0d,0x02,0x60]
+0x02 0x03 0x41 0xd0 0x04 0x0d 0x02 0x60
+
+# VI: v_cmp_lt_f32_e64 s[2:3], -|v4|, -|v6| ; encoding: [0x02,0x03,0x41,0xd0,0x04,0x0d,0x02,0x60]
+0x02 0x03 0x41 0xd0 0x04 0x0d 0x02 0x60
+
+# VI: v_cmp_f_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x40,0xd0,0x04,0x0d,0x02,0x00]
+0x02 0x00 0x40 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_cmp_lt_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x41,0xd0,0x04,0x0d,0x02,0x00]
+0x02 0x00 0x41 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_cmp_eq_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x42,0xd0,0x04,0x0d,0x02,0x00]
+0x02 0x00 0x42 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_cmp_le_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x43,0xd0,0x04,0x0d,0x02,0x00]
+0x02 0x00 0x43 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_cmp_gt_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x44,0xd0,0x04,0x0d,0x02,0x00]
+0x02 0x00 0x44 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_cmp_lg_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x45,0xd0,0x04,0x0d,0x02,0x00]
+0x02 0x00 0x45 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_cmp_ge_f32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0x46,0xd0,0x04,0x0d,0x02,0x00]
+0x02 0x00 0x46 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_cmp_f_f64_e64 s[2:3], v[4:5], v[6:7] ; encoding: [0x02,0x00,0x60,0xd0,0x04,0x0d,0x02,0x00]
+0x02 0x00 0x60 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_cmp_f_i32_e64 s[2:3], v4, v6 ; encoding: [0x02,0x00,0xc0,0xd0,0x04,0x0d,0x02,0x00]
+0x02 0x00 0xc0 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_cmp_f_i64_e64 s[2:3], v[4:5], v[6:7] ; encoding: [0x02,0x00,0xe0,0xd0,0x04,0x0d,0x02,0x00]
+0x02 0x00 0xe0 0xd0 0x04 0x0d 0x02 0x00
+
+# VI: v_mov_b32_e64 v1, v2 ; encoding: [0x01,0x00,0x41,0xd1,0x02,0x01,0x00,0x00]
+0x01 0x00 0x41 0xd1 0x02 0x01 0x00 0x00
+
+# VI: v_nop ; encoding: [0x00,0x00,0x40,0xd1,0x00,0x00,0x00,0x00]
+0x00 0x00 0x40 0xd1 0x00 0x00 0x00 0x00
+
+# VI: v_clrexcp ; encoding: [0x00,0x00,0x75,0xd1,0x00,0x00,0x00,0x00]
+0x00 0x00 0x75 0xd1 0x00 0x00 0x00 0x00
+
+# VI: v_fract_f32_e64 v1, -v2 ; encoding: [0x01,0x00,0x5b,0xd1,0x02,0x01,0x00,0x20]
+0x01 0x00 0x5b 0xd1 0x02 0x01 0x00 0x20
+
+# VI: v_fract_f32_e64 v1, |v2| ; encoding: [0x01,0x01,0x5b,0xd1,0x02,0x01,0x00,0x00]
+0x01 0x01 0x5b 0xd1 0x02 0x01 0x00 0x00
+
+# VI: v_fract_f32_e64 v1, |v2| ; encoding: [0x01,0x01,0x5b,0xd1,0x02,0x01,0x00,0x00]
+0x01 0x01 0x5b 0xd1 0x02 0x01 0x00 0x00
+
+# VI: v_fract_f32_e64 v1, -|v2| ; encoding: [0x01,0x01,0x5b,0xd1,0x02,0x01,0x00,0x20]
+0x01 0x01 0x5b 0xd1 0x02 0x01 0x00 0x20
+
+# VI: v_fract_f32_e64 v1, -|v2| ; encoding: [0x01,0x01,0x5b,0xd1,0x02,0x01,0x00,0x20]
+0x01 0x01 0x5b 0xd1 0x02 0x01 0x00 0x20
+
+# VI: v_fract_f32_e64 v1, v2 clamp ; encoding: [0x01,0x80,0x5b,0xd1,0x02,0x01,0x00,0x00]
+0x01 0x80 0x5b 0xd1 0x02 0x01 0x00 0x00
+
+# VI: v_fract_f32_e64 v1, v2 mul:2 ; encoding: [0x01,0x00,0x5b,0xd1,0x02,0x01,0x00,0x08]
+0x01 0x00 0x5b 0xd1 0x02 0x01 0x00 0x08
+
+# VI: v_fract_f32_e64 v1, v2 clamp div:2 ; encoding: [0x01,0x80,0x5b,0xd1,0x02,0x01,0x00,0x18]
+0x01 0x80 0x5b 0xd1 0x02 0x01 0x00 0x18
+
+# VI: v_add_f32_e64 v1, v3, v5 ; encoding: [0x01,0x00,0x01,0xd1,0x03,0x0b,0x02,0x00]
+0x01 0x00 0x01 0xd1 0x03 0x0b 0x02 0x00
+
+# VI: v_cndmask_b32_e64 v1, v3, v5, s[4:5] ; encoding: [0x01,0x00,0x00,0xd1,0x03,0x0b,0x12,0x00]
+0x01 0x00 0x00 0xd1 0x03 0x0b 0x12 0x00
+
+# VI: v_add_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x01,0xd1,0x03,0x0b,0x00,0x00]
+0x01 0x00 0x01 0xd1 0x03 0x0b 0x00 0x00
+
+# VI: v_sub_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x02,0xd1,0x03,0x0b,0x00,0x00]
+0x01 0x00 0x02 0xd1 0x03 0x0b 0x00 0x00
+
+# VI: v_subrev_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x03,0xd1,0x03,0x0b,0x00,0x00]
+0x01 0x00 0x03 0xd1 0x03 0x0b 0x00 0x00
+
+# VI: v_mul_legacy_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x04,0xd1,0x03,0x0b,0x00,0x00]
+0x01 0x00 0x04 0xd1 0x03 0x0b 0x00 0x00
+
+# VI: v_mul_f32_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x05,0xd1,0x03,0x0b,0x00,0x00]
+0x01 0x00 0x05 0xd1 0x03 0x0b 0x00 0x00
+
+# VI: v_mul_i32_i24_e64 v1, v3, s5 ; encoding: [0x01,0x00,0x06,0xd1,0x03,0x0b,0x00,0x00]
+0x01 0x00 0x06 0xd1 0x03 0x0b 0x00 0x00
+
+# VI: v_mad_legacy_f32 v2, v4, v6, v8 ; encoding: [0x02,0x00,0xc0,0xd1,0x04,0x0d,0x22,0x04]
+0x02 0x00 0xc0 0xd1 0x04 0x0d 0x22 0x04
+
+# VI: v_add_f64 v[0:1], v[2:3], v[5:6] ; encoding: [0x00,0x00,0x80,0xd2,0x02,0x0b,0x02,0x00]
+0x00 0x00 0x80 0xd2 0x02 0x0b 0x02 0x00
+
+# VI: v_add_f64 v[0:1], v[2:3], v[5:6] ; encoding: [0x00,0x00,0x80,0xd2,0x02,0x0b,0x02,0x00]
+0x00 0x00 0x80 0xd2 0x02 0x0b 0x02 0x00
+
+# VI: v_add_f64 v[0:1], -v[2:3], v[5:6] ; encoding: [0x00,0x00,0x80,0xd2,0x02,0x0b,0x02,0x20]
+0x00 0x00 0x80 0xd2 0x02 0x0b 0x02 0x20
+
+# VI: v_add_f64 v[0:1], -v[2:3], v[5:6] ; encoding: [0x00,0x00,0x80,0xd2,0x02,0x0b,0x02,0x20]
+0x00 0x00 0x80 0xd2 0x02 0x0b 0x02 0x20
+
+# VI: v_add_f64 v[0:1], v[2:3], -v[5:6] ; encoding: [0x00,0x00,0x80,0xd2,0x02,0x0b,0x02,0x40]
+0x00 0x00 0x80 0xd2 0x02 0x0b 0x02 0x40
+
+# VI: v_add_f64 v[0:1], v[2:3], -v[5:6] ; encoding: [0x00,0x00,0x80,0xd2,0x02,0x0b,0x02,0x40]
+0x00 0x00 0x80 0xd2 0x02 0x0b 0x02 0x40
+
+# VI: v_add_f64 v[0:1], |v[2:3]|, v[5:6] ; encoding: [0x00,0x01,0x80,0xd2,0x02,0x0b,0x02,0x00]
+0x00 0x01 0x80 0xd2 0x02 0x0b 0x02 0x00
+
+# VI: v_add_f64 v[0:1], |v[2:3]|, v[5:6] ; encoding: [0x00,0x01,0x80,0xd2,0x02,0x0b,0x02,0x00]
+0x00 0x01 0x80 0xd2 0x02 0x0b 0x02 0x00
+
+# VI: v_add_f64 v[0:1], |v[2:3]|, v[5:6] ; encoding: [0x00,0x01,0x80,0xd2,0x02,0x0b,0x02,0x00]
+0x00 0x01 0x80 0xd2 0x02 0x0b 0x02 0x00
+
+# VI: v_add_f64 v[0:1], |v[2:3]|, v[5:6] ; encoding: [0x00,0x01,0x80,0xd2,0x02,0x0b,0x02,0x00]
+0x00 0x01 0x80 0xd2 0x02 0x0b 0x02 0x00
+
+# VI: v_add_f64 v[0:1], v[2:3], |v[5:6]| ; encoding: [0x00,0x02,0x80,0xd2,0x02,0x0b,0x02,0x00]
+0x00 0x02 0x80 0xd2 0x02 0x0b 0x02 0x00
+
+# VI: v_add_f64 v[0:1], v[2:3], |v[5:6]| ; encoding: [0x00,0x02,0x80,0xd2,0x02,0x0b,0x02,0x00]
+0x00 0x02 0x80 0xd2 0x02 0x0b 0x02 0x00
+
+# VI: v_add_f64 v[0:1], v[2:3], |v[5:6]| ; encoding: [0x00,0x02,0x80,0xd2,0x02,0x0b,0x02,0x00]
+0x00 0x02 0x80 0xd2 0x02 0x0b 0x02 0x00
+
+# VI: v_add_f64 v[0:1], v[2:3], |v[5:6]| ; encoding: [0x00,0x02,0x80,0xd2,0x02,0x0b,0x02,0x00]
+0x00 0x02 0x80 0xd2 0x02 0x0b 0x02 0x00
+
+# VI: v_add_f64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4 ; encoding: [0x00,0x82,0x80,0xd2,0x02,0x0b,0x02,0x30]
+0x00 0x82 0x80 0xd2 0x02 0x0b 0x02 0x30
+
+# VI: v_add_f64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4 ; encoding: [0x00,0x82,0x80,0xd2,0x02,0x0b,0x02,0x30]
+0x00 0x82 0x80 0xd2 0x02 0x0b 0x02 0x30
+
+# VI: v_add_f64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4 ; encoding: [0x00,0x82,0x80,0xd2,0x02,0x0b,0x02,0x30]
+0x00 0x82 0x80 0xd2 0x02 0x0b 0x02 0x30
+
+# VI: v_add_f64 v[0:1], -v[2:3], |v[5:6]| clamp mul:4 ; encoding: [0x00,0x82,0x80,0xd2,0x02,0x0b,0x02,0x30]
+0x00 0x82 0x80 0xd2 0x02 0x0b 0x02 0x30
+
+# VI: v_div_scale_f64 v[24:25], vcc, v[22:23], v[22:23], v[20:21] ; encoding: [0x18,0x6a,0xe1,0xd1,0x16,0x2d,0x52,0x04]
+0x18 0x6a 0xe1 0xd1 0x16 0x2d 0x52 0x04
+
+# VI: v_div_scale_f64 v[24:25], s[10:11], v[22:23], v[20:21], v[20:21] ; encoding: [0x18,0x0a,0xe1,0xd1,0x16,0x29,0x52,0x04]
+0x18 0x0a 0xe1 0xd1 0x16 0x29 0x52 0x04
+
+# VI: v_div_scale_f32 v24, vcc, v22, v22, v20 ; encoding: [0x18,0x6a,0xe0,0xd1,0x16,0x2d,0x52,0x04]
+0x18 0x6a 0xe0 0xd1 0x16 0x2d 0x52 0x04
+
+# FIXME: v_div_scale_f32 v24, vcc, s[10:11], v22, v20 ; encoding: [0x18,0x6a,0xe0,0xd1,0x0a,0x2c,0x52,0x04]
+0x18 0x6a 0xe0 0xd1 0x0a 0x2c 0x52 0x04
+
+# VI: v_div_scale_f32 v24, s[10:11], v22, v22, v20 ; encoding: [0x18,0x0a,0xe0,0xd1,0x16,0x2d,0x52,0x04]
+0x18 0x0a 0xe0 0xd1 0x16 0x2d 0x52 0x04
+
+# VI: v_div_scale_f32 v24, vcc, v22, 1.0, v22 ; encoding: [0x18,0x6a,0xe0,0xd1,0x16,0xe5,0x59,0x04]
+0x18 0x6a 0xe0 0xd1 0x16 0xe5 0x59 0x04
+
+# VI: v_div_scale_f32 v24, vcc, v22, v22, -2.0 ; encoding: [0x18,0x6a,0xe0,0xd1,0x16,0x2d,0xd6,0x03]
+0x18 0x6a 0xe0 0xd1 0x16 0x2d 0xd6 0x03
+
+# VI: v_div_scale_f32 v24, vcc, v22, v22, -2.0 ; encoding: [0x18,0x6a,0xe0,0xd1,0x16,0x2d,0xd6,0x03]
+0x18 0x6a 0xe0 0xd1 0x16 0x2d 0xd6 0x03
+
+# VI: v_mad_f32 v9, 0.5, v5, -v8 ; encoding: [0x09,0x00,0xc1,0xd1,0xf0,0x0a,0x22,0x84]
+0x09 0x00 0xc1 0xd1 0xf0 0x0a 0x22 0x84
Modified: llvm/trunk/test/MC/Disassembler/AMDGPU/vopc_vi.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/vopc_vi.txt?rev=263729&r1=263728&r2=263729&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/vopc_vi.txt (original)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/vopc_vi.txt Thu Mar 17 12:56:33 2016
@@ -6,6 +6,12 @@
# VI: v_cmp_lt_f32_e32 vcc, 0, v4 ; encoding: [0x80,0x08,0x82,0x7c]
0x80 0x08 0x82 0x7c
+# VI: v_cmp_lt_f32_e32 vcc, 0x41200000, v4 ; encoding: [0xff,0x08,0x82,0x7c,0x00,0x00,0x20,0x41]
+0xff 0x08 0x82 0x7c 0x00 0x00 0x20 0x41
+
+# VI: v_cmp_lt_f32_e32 vcc, v255, v255 ; encoding: [0xff,0xff,0x83,0x7c]
+0xff 0xff 0x83 0x7c
+
# VI: v_cmp_lt_f32_e32 vcc, v2, v4 ; encoding: [0x02,0x09,0x82,0x7c]
0x02 0x09 0x82 0x7c
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