[PATCH] D18162: AMDGPU: Add SIWholeQuadMode pass
Tom Stellard via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 16 14:11:06 PDT 2016
tstellarAMD added a comment.
The target independent changes might get more visibility if they were in a separate patch.
> The changes in this patch expose a problem with the second machine
> scheduling pass: target independent instructions like COPY implicitly
> use EXEC when they operate on VGPRs, but this fact is not encoded in
> the MIR. This can lead to miscompilation because instructions are
> moved past changes to EXEC.
Is the Scheduler the only pass we need to worry about? Would we be able to avoid the problem by implementing TargetInstrInfo::isSchedulingBoundry() ?
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