[PATCH] D18164: [tsan] Do not instrument reads/writes to instruction profile counters.

[Xinliang David Li via llvm-commits]

On Wed, Mar 16, 2016 at 1:11 AM, Dmitry Vyukov <dvyukov at google.com> wrote:

> dvyukov added a comment.
>
> > Back to your proposal to use Monotonic load. It does not fix the actual
> race
>
>
> Your definition of race disagrees with C/C++ standards and llvm rules. The
> proposal does fix the races and eliminates undefined behavior. It is legal
> to do atomic_store(p, atomic_load(p) + 1) if that's what you want (compiler
> ought to emit single ADD instruction for that).
>
> > I don't agree with you about the 'incorrect code' part.
>
>
> Check out http://llvm.org/docs/Atomics.html#optimization-outside-atomic
> "The basic 'load' and 'store' allow a variety of optimizations, but can
> lead to undefined results in a concurrent environment"
>
>
yes -- C++ memory model does not allow speculative store motion. However in
that example,  The compiler can do the following to remove the memory
access of x in loop:

int x;
void f(int* a) {
  int xtemp = x;
  bool stored_p = false;
  for (int i = 0; i < 100; i++) {
    if (a[i]) {
      xtemp += 1;
      stored_p = true;
    }
  }

 if (stored_p)
    x = xtemp;
}

David


>
> http://reviews.llvm.org/D18164
>
>
>
>
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