[PATCH] D17540: [MIPS][LLVM-MC] Fix Disassemble of Negative Offset

[Nitesh Jain via llvm-commits]

nitesh.jain added inline comments.

================
Comment at: test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt:36
@@ -35,2 +35,3 @@
 0x04 0x11 0x14 0x9b # CHECK: bal 21104
 # FIXME: The encode/decode functions are not inverses of each other.
+0x18 0x02 0x01 0x4d # CHECK: blezalc $2, 1336
----------------
dsanders wrote:
> Are these FIXME's still true? If you assemble the mnemonics from the disassembler do you get the same opcodes?
> I suspect this change may have fixed the ones next to the tests you've updated.
The encoding and decoding are not inverse of each other. Since while decoding the offset is left shifted by 2 and then 4 is added but in case of encoding it will just right shift by 2. Thus for example

encoding 0x18 0x42 0x01 0x4d -->disassemble -->bgezalc $2, 1336
bgezalc $2, 1336-->assemble-->0x18 0x42 0x01 0x4e
0x18 0x42 0x01 0x4e-->disassemble-->bgezalc $2, 1340.

So these FIXME's will always be true


Repository:
  rL LLVM

http://reviews.llvm.org/D17540