[PATCH] D18189: [X86][XOP] Support for VPPERM byte shuffle instruction

[Simon Pilgrim via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: delena, spatel, andreadb, silvas.
RKSimon added a subscriber: llvm-commits.
RKSimon set the repository for this revision to rL LLVM.

This patch begins adding support for lowering to the XOP VPPERM instruction - adding the X86ISD::VPPERM opcode and shuffle mask decoding (for the more basic shuffle operations that the instruction supports).

The mask decoding required the existing MCInstrLowering code to be updated to support binary shuffles - the implementation now matches what is done in X86InstrCOmments.cpp. This should be useful for some AVX512 binary shuffles (VPERMT2 etc.) as well.

A followup patch will enable VPPERM as a target shuffle for combining.

Repository:
  rL LLVM

http://reviews.llvm.org/D18189

Files:
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86ISelLowering.h
  lib/Target/X86/X86InstrFragmentsSIMD.td
  lib/Target/X86/X86InstrXOP.td
  lib/Target/X86/X86IntrinsicsInfo.h
  lib/Target/X86/X86MCInstLower.cpp
  lib/Target/X86/X86ShuffleDecodeConstantPool.cpp
  lib/Target/X86/X86ShuffleDecodeConstantPool.h
  test/CodeGen/X86/vector-shuffle-combining-xop.ll

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