[PATCH] D18151: AMDGPU/SI: Add llvm.amdgcn.buffer.atomic.* intrinsics

[Nicolai Hähnle via llvm-commits]

nhaehnle created this revision.
nhaehnle added reviewers: tstellarAMD, arsenm.
nhaehnle added subscribers: llvm-commits, rivanvx.
Herald added a subscriber: arsenm.

These intrinsics expose the BUFFER_ATOMIC_* instructions and will be used
by Mesa to implement atomics with buffer semantics. The intrinsic interface
matches that of buffer.load.format and buffer.store.format, except that the
GLC bit is not exposed (it is automatically deduced based on whether the
return value is used).

The change of hasSideEffects is required for TableGen to accept the pattern
that matches the intrinsic.

Note that there are minor conflicts with http://reviews.llvm.org/D17280,
which also touches BUFFER_ATOMIC_CMPSWAP.

http://reviews.llvm.org/D18151

Files:
  include/llvm/IR/IntrinsicsAMDGPU.td
  lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.td
  lib/Target/AMDGPU/SIInstructions.td
  test/Analysis/DivergenceAnalysis/AMDGPU/llvm.amdgcn.buffer.atomic.ll
  test/CodeGen/AMDGPU/llvm.amdgcn.buffer.atomic.ll

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