[PATCH] D17967: [TII] Allow getMemOpBaseRegImmOfs() to accept negative offsets. NFC.

[Chad Rosier via llvm-commits]

mcrosier created this revision.
mcrosier added reviewers: t.p.northover, gberry, qcolombet, atrick.
mcrosier added a subscriber: llvm-commits.
Herald added a reviewer: tstellarAMD.
Herald added subscribers: arsenm, MatzeB, aemerson.

Offsets can be negative, of course.

This is in preparation for a follow up patch to improve the AArch64 load/store optimization pass.  I plan on adding unscaled loads to getMemOpBaseRegImmOfs() so the MI scheduler clusters loads to improve pairing.  In AArch64 unscaled loads/stores are used for negatives offsets.

Please have a look.

 Chad

http://reviews.llvm.org/D17967

Files:
  include/llvm/Target/TargetInstrInfo.h
  lib/CodeGen/ImplicitNullChecks.cpp
  lib/CodeGen/MachineScheduler.cpp
  lib/CodeGen/MachineSink.cpp
  lib/Target/AArch64/AArch64InstrInfo.cpp
  lib/Target/AArch64/AArch64InstrInfo.h
  lib/Target/AArch64/AArch64StorePairSuppress.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.h
  lib/Target/AMDGPU/SIMachineScheduler.cpp
  lib/Target/X86/X86InstrInfo.cpp
  lib/Target/X86/X86InstrInfo.h

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