[PATCH] D17356: Fix PR26655: Incorrect liveness for bundled instructions with CPSR<kill> marker

Tim Northover via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 8 09:34:04 PST 2016


t.p.northover added a comment.

Hi,

Sorry it's taken so long to review this, but it doesn't look right to me. The IT placement pass is producing what looks like correct code:

  BUNDLE %ITSTATE<imp-def,dead>, %R0<imp-def>, %D16<imp-def>, %R2<imp-use>, %CPSR<imp-use,kill>, %D17<imp-use,kill>
    * t2IT 12, 4, %ITSTATE<imp-def>
    * %R0<def> = t2MOVr %R2, pred:12, pred:%CPSR, opt:%noreg, %ITSTATE<imp-use,internal>
    * %D16<def> = VMOVD %D17<kill>, pred:12, pred:%CPSR<kill>, %ITSTATE<imp-use,kill,internal>

And then the Machine Scheduler adds what looks like a spurious <kill> flag to the CPSR usage:

  BUNDLE %ITSTATE<imp-def,dead>, %R0<imp-def>, %D16<imp-def>, %R2<imp-use>, %CPSR<imp-use,kill>, %D17<imp-use,kill>
    * t2IT 12, 4, %ITSTATE<imp-def>
    * %R0<def> = t2MOVr %R2, pred:12, pred:%CPSR<kill>, opt:%noreg, %ITSTATE<imp-use,internal>
    * %D16<def> = VMOVD %D17<kill>, pred:12, pred:%CPSR<kill>, %ITSTATE<imp-use,kill,internal>

I think there's some kind of bug in the scheduler, or how ARM interacts with it. Or possibly ARM's entire usage of bundles (if the rest of LLVM strongly thinks the contents occur simultaneously or something), but that would be a shame.

Cheers.

Tim.


Repository:
  rL LLVM

http://reviews.llvm.org/D17356





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