[llvm] r262943 - Revert r262759 and r262760.

[Quentin Colombet via llvm-commits]

Author: qcolombet
Date: Tue Mar  8 11:29:11 2016
New Revision: 262943

URL: http://llvm.org/viewvc/llvm-project?rev=262943&view=rev
Log:
Revert r262759 and r262760.
The fix consisting in using the library call for atomic compare and swap when
the instruction is not safe to use may be incorrect. Indeed the library call may
not exist on all platform. In other words, we need a better fix! 

Removed:
    llvm/trunk/test/CodeGen/X86/base-pointer-and-cmpxchg.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=262943&r1=262942&r2=262943&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Mar  8 11:29:11 2016
@@ -21233,15 +21233,6 @@ void X86TargetLowering::ReplaceNodeResul
                                    Results);
   }
   case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: {
-    // If the current function needs the base pointer, RBX,
-    // we shouldn't use cmpxchg.
-    // Indeed the lowering of that instruction will clobber
-    // that register and since RBX will be a reserved register
-    // the register allocator will not make sure its value will
-    // be properly saved and restored around this live-range.
-    const X86RegisterInfo *TRI = Subtarget.getRegisterInfo();
-    if (TRI->hasBasePointer(DAG.getMachineFunction()))
-      return;
     EVT T = N->getValueType(0);
     assert((T == MVT::i64 || T == MVT::i128) && "can only expand cmpxchg pair");
     bool Regs64bit = T == MVT::i128;

Removed: llvm/trunk/test/CodeGen/X86/base-pointer-and-cmpxchg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/base-pointer-and-cmpxchg.ll?rev=262942&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/base-pointer-and-cmpxchg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/base-pointer-and-cmpxchg.ll (removed)
@@ -1,30 +0,0 @@
-; RUN: llc -mattr=+cx16 -x86-use-base-pointer=true -stackrealign -stack-alignment=32  %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE %s
-; RUN: llc -mattr=+cx16 -x86-use-base-pointer=false -stackrealign -stack-alignment=32  %s -o - | FileCheck --check-prefix=CHECK --check-prefix=DONT_USE_BASE %s
-target triple = "x86_64-apple-macosx"
-
-; This function uses dynamic allocated stack to force the use
-; of a frame pointer.
-; The inline asm clobbers a bunch of registers to make sure
-; the frame pointer will need to be used (for spilling in that case).
-;
-; Then, we check that when we use rbx as the base pointer,
-; we do not use cmpxchg, since using that instruction requires
-; to clobbers rbx to set the arguments of the instruction and when
-; rbx is used as the base pointer, RA cannot fix the code for us.
-;
-; CHECK-LABEL: cmp_and_swap16:
-; Check that we actually use rbx.
-; USE_BASE: movq %rsp, %rbx
-; USE_BASE-NOT: cmpxchg
-;
-; DONT_USE_BASE-NOT: movq %rsp, %rbx
-; DONT_USE_BASE: cmpxchg
-define i1 @cmp_and_swap16(i128 %a, i128 %b, i128* %addr, i32 %n) {
-  %dummy = alloca i32, i32 %n
-tail call void asm sideeffect "nop", "~{rax},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
-  %cmp = cmpxchg i128* %addr, i128 %a, i128 %b seq_cst seq_cst
-  %res = extractvalue { i128, i1 } %cmp, 1
-  %idx = getelementptr i32, i32* %dummy, i32 5
-  store i32 %n, i32* %idx
-  ret i1 %res
-}