[PATCH] D17892: AMDGPU/SI: Implement S_GETREG Intrinsic

Fang, Changpeng via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 7 15:27:44 PST 2016



-----Original Message-----
From: Matt Arsenault [mailto:Matthew.Arsenault at amd.com] 
Sent: Friday, March 04, 2016 9:58 AM
To: Fang, Changpeng; tom at stellard.net; Chan, SiuChi
Cc: llvm-commits at lists.llvm.org
Subject: Re: [PATCH] D17892: AMDGPU/SI: Implement S_GETREG Intrinsic

arsenm added a comment.

>SC has some prettier syntax for the values being read, but that can be a separate patch

Yes, we can do that later in a separate patch.
\
================
Comment at: include/llvm/IR/IntrinsicsAMDGPU.td:221
@@ +220,3 @@
+def int_amdgcn_s_getreg :
+  Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
+
----------------
>This needs to be read only. In special cases the call site can be marked readnone
What's the name for "read only" attribute here? Readonly, ReadOnly? ...


================
Comment at: lib/Target/AMDGPU/SIInstructions.td:2076
@@ +2075,3 @@
+  (int_amdgcn_s_getreg imm:$simm16),
+  (S_GETREG_B32 (as_i16imm $simm16))
+>;
----------------
>You should be able to put this in the instruction definition 
Could not make this work in the instruction definition, especially for the type conversion.

http://reviews.llvm.org/D17892





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