[PATCH] D17838: [Power9] Implement new altivec instructions: bcd* series

amehsan via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 3 16:28:18 PST 2016


amehsan added inline comments.

================
Comment at: lib/Target/PowerPC/PPCInstrAltivec.td:1283
@@ +1282,3 @@
+
+// [PO VRT EO VRB 1 PS XO], "_o" means CR6 is reflected.
+class VX_VT5_EO5_VB5_PS1_XO9_o<bits<5> eo, bits<9> xo, string opc,
----------------
You can change the comment to "CR6 is set" to make it more understandable. Wording of ISA for bcdcfn. is: "CR field 6 is set to reflect src compared to zero". 

================
Comment at: lib/Target/PowerPC/PPCInstrAltivec.td:1318
@@ +1317,3 @@
+
+// [PO VRT VRA VRB 1 PS XO], "_o" means CR6 is reflected.
+class VX_VT5_VA5_VB5_PS1_XO9_o<bits<9> xo, string opc, list<dag> pattern>
----------------
same here.


http://reviews.llvm.org/D17838





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