[PATCH] D17373: [mips][microMIPS] Prevent usage of OR16_MMR6 instruction when code for microMIPS is generated.

[Daniel Sanders via llvm-commits]

dsanders accepted this revision.
dsanders added a comment.

LGTM with main simplified as well.


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Comment at: test/CodeGen/Mips/micromips-or16.ll:4
@@ +3,3 @@
+; RUN: llc -O0 -march=mips -mcpu=mips32r2 -mattr=+micromips \
+; RUN:  -asm-show-inst < %s | FileCheck %s
+
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Indentation is off by one

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Comment at: test/CodeGen/Mips/micromips-or16.ll:15-29
@@ -3,14 +14,16 @@
 
 define i32 @main() {
 entry:
+; CHECK-LABEL: main
+; CHECK: or16
   %retval = alloca i32, align 4
   %a = alloca i32, align 4
   %b = alloca i32, align 4
   %c = alloca i32, align 4
   store i32 0, i32* %retval
   %0 = load i32, i32* %b, align 4
   %1 = load i32, i32* %c, align 4
   %or = or i32 %0, %1
   store i32 %or, i32* %a, align 4
   ret i32 0
 }
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The allocas/loads/stores are unnecessary. We should simplify this in a similar way to 'f' (but with a single basic block).


http://reviews.llvm.org/D17373