[llvm] r262456 - AMDGPU: Cleanup suggested in bug 23960

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 1 20:05:14 PST 2016


Author: arsenm
Date: Tue Mar  1 22:05:14 2016
New Revision: 262456

URL: http://llvm.org/viewvc/llvm-project?rev=262456&view=rev
Log:
AMDGPU: Cleanup suggested in bug 23960

Modified:
    llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp?rev=262456&r1=262455&r2=262456&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp Tue Mar  1 22:05:14 2016
@@ -1051,12 +1051,10 @@ bool SIInstrInfo::FoldImmediate(MachineI
     // Multiplied part is the constant: Use v_madmk_f32
     // We should only expect these to be on src0 due to canonicalizations.
     if (Src0->isReg() && Src0->getReg() == Reg) {
-      if (!Src1->isReg() ||
-          (Src1->isReg() && RI.isSGPRClass(MRI->getRegClass(Src1->getReg()))))
+      if (!Src1->isReg() || RI.isSGPRClass(MRI->getRegClass(Src1->getReg())))
         return false;
 
-      if (!Src2->isReg() ||
-          (Src2->isReg() && RI.isSGPRClass(MRI->getRegClass(Src2->getReg()))))
+      if (!Src2->isReg() || RI.isSGPRClass(MRI->getRegClass(Src2->getReg())))
         return false;
 
       // We need to do some weird looking operand shuffling since the madmk
@@ -1116,8 +1114,7 @@ bool SIInstrInfo::FoldImmediate(MachineI
           (Src0->isReg() && RI.isSGPRClass(MRI->getRegClass(Src0->getReg()))))
         return false;
 
-      if (!Src1->isReg() ||
-          (Src1->isReg() && RI.isSGPRClass(MRI->getRegClass(Src1->getReg()))))
+      if (!Src1->isReg() || RI.isSGPRClass(MRI->getRegClass(Src1->getReg())))
         return false;
 
       const int64_t Imm = DefMI->getOperand(1).getImm();




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