[PATCH] D17711: Fix for PR 26617 (disable scalar-to-vector conversions using direct moves for 32-bit targets)

[Kit Barton via llvm-commits]

kbarton added inline comments.

================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:560
@@ -559,3 +559,3 @@
       }
-      if (Subtarget.hasDirectMove()) {
+      if (Subtarget.hasDirectMove() && Subtarget.use64BitRegs()) {
         setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i8, Legal);
----------------
The definition of use64BitRegs is confusing to me.
Could you use Subtarget.isPPC64() instead? We basically only want to do this when we are in 64-bit mode, as I understand it. 


Repository:
  rL LLVM

http://reviews.llvm.org/D17711