[PATCH] D17747: TableGen: Check scheduling models for completeness

[Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL262384: TableGen: Check scheduling models for completeness (authored by matze).

Changed prior to commit:
  http://reviews.llvm.org/D17747?vs=49517&id=49533#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D17747

Files:
  llvm/trunk/include/llvm/Target/TargetSchedule.td
  llvm/trunk/lib/Target/AArch64/AArch64SchedA53.td
  llvm/trunk/lib/Target/AArch64/AArch64SchedA57.td
  llvm/trunk/lib/Target/AArch64/AArch64SchedCyclone.td
  llvm/trunk/lib/Target/AArch64/AArch64SchedKryo.td
  llvm/trunk/lib/Target/AMDGPU/SISchedule.td
  llvm/trunk/lib/Target/ARM/ARMScheduleA8.td
  llvm/trunk/lib/Target/Hexagon/HexagonScheduleV4.td
  llvm/trunk/lib/Target/Hexagon/HexagonScheduleV55.td
  llvm/trunk/lib/Target/Hexagon/HexagonScheduleV60.td
  llvm/trunk/lib/Target/Mips/MipsScheduleP5600.td
  llvm/trunk/lib/Target/PowerPC/PPCSchedule440.td
  llvm/trunk/lib/Target/PowerPC/PPCScheduleA2.td
  llvm/trunk/lib/Target/PowerPC/PPCScheduleE500mc.td
  llvm/trunk/lib/Target/PowerPC/PPCScheduleE5500.td
  llvm/trunk/lib/Target/PowerPC/PPCScheduleG5.td
  llvm/trunk/lib/Target/PowerPC/PPCScheduleP7.td
  llvm/trunk/lib/Target/PowerPC/PPCScheduleP8.td
  llvm/trunk/lib/Target/X86/X86Schedule.td
  llvm/trunk/lib/Target/X86/X86ScheduleAtom.td
  llvm/trunk/utils/TableGen/CodeGenSchedule.cpp
  llvm/trunk/utils/TableGen/CodeGenSchedule.h

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