[PATCH] D16875: MemorySSA Optimizations: Patch 1 of N

[David Li via llvm-commits]

davidxl added inline comments.

================
Comment at: test/Transforms/Util/MemorySSA/atomic-clobber.ll:42
@@ +41,3 @@
+  %1 = load atomic i32, i32* %a acquire, align 4
+; CHECK: MemoryUse(1)
+; CHECK-NEXT: %2 = load atomic i32
----------------
yes -- load acquire prevents all following load/store from being moved above it.   The problem is that the memory SSA dump confused me a little:

I thought ID:1 MemoryDef is for the LiveOnEntry -- but actually it is the MemoryDef associated the acquire load.

So indeed this is correct.

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Comment at: test/Transforms/Util/MemorySSA/atomic-clobber.ll:45
@@ +44,3 @@
+  %2 = load atomic i32, i32* %a unordered, align 4
+; CHECK: 2 = MemoryDef(1)
+; CHECK-NEXT: %3 = load atomic i32
----------------
you are right -- I missread the dump.


http://reviews.llvm.org/D16875