[PATCH] D16888: [mips] Addition of a third operand to the instructions [d]div, [d]divu

Srdjan Obucina via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 24 07:10:58 PST 2016


obucina updated the summary for this revision.
obucina updated this revision to Diff 48932.
obucina added a comment.

Review changes applied. Added additional test for case when destination register is zero register.


http://reviews.llvm.org/D16888

Files:
  lib/Target/Mips/AsmParser/MipsAsmParser.cpp
  lib/Target/Mips/MipsInstrInfo.td
  test/MC/Mips/macro-ddiv.s
  test/MC/Mips/macro-ddivu.s
  test/MC/Mips/macro-div.s
  test/MC/Mips/macro-divu.s

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