[llvm] r261460 - [InstCombine] SSE/SSE2 (u)comiss/(u)comisd comparison intrinsics only use the lowest vector element
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Feb 20 15:17:35 PST 2016
Author: rksimon
Date: Sat Feb 20 17:17:35 2016
New Revision: 261460
URL: http://llvm.org/viewvc/llvm-project?rev=261460&view=rev
Log:
[InstCombine] SSE/SSE2 (u)comiss/(u)comisd comparison intrinsics only use the lowest vector element
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
llvm/trunk/test/Transforms/InstCombine/x86-sse.ll
llvm/trunk/test/Transforms/InstCombine/x86-sse2.ll
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp?rev=261460&r1=261459&r2=261460&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCalls.cpp Sat Feb 20 17:17:35 2016
@@ -1194,6 +1194,46 @@ Instruction *InstCombiner::visitCallInst
break;
}
+ case Intrinsic::x86_sse_comieq_ss:
+ case Intrinsic::x86_sse_comige_ss:
+ case Intrinsic::x86_sse_comigt_ss:
+ case Intrinsic::x86_sse_comile_ss:
+ case Intrinsic::x86_sse_comilt_ss:
+ case Intrinsic::x86_sse_comineq_ss:
+ case Intrinsic::x86_sse_ucomieq_ss:
+ case Intrinsic::x86_sse_ucomige_ss:
+ case Intrinsic::x86_sse_ucomigt_ss:
+ case Intrinsic::x86_sse_ucomile_ss:
+ case Intrinsic::x86_sse_ucomilt_ss:
+ case Intrinsic::x86_sse_ucomineq_ss:
+ case Intrinsic::x86_sse2_comieq_sd:
+ case Intrinsic::x86_sse2_comige_sd:
+ case Intrinsic::x86_sse2_comigt_sd:
+ case Intrinsic::x86_sse2_comile_sd:
+ case Intrinsic::x86_sse2_comilt_sd:
+ case Intrinsic::x86_sse2_comineq_sd:
+ case Intrinsic::x86_sse2_ucomieq_sd:
+ case Intrinsic::x86_sse2_ucomige_sd:
+ case Intrinsic::x86_sse2_ucomigt_sd:
+ case Intrinsic::x86_sse2_ucomile_sd:
+ case Intrinsic::x86_sse2_ucomilt_sd:
+ case Intrinsic::x86_sse2_ucomineq_sd: {
+ // These intrinsics only demand the 0th element of their input vectors. If
+ // we can simplify the input based on that, do so now.
+ Value *Arg0 = II->getArgOperand(0);
+ Value *Arg1 = II->getArgOperand(1);
+ unsigned VWidth = Arg0->getType()->getVectorNumElements();
+ if (Value *V = SimplifyDemandedVectorEltsLow(Arg0, VWidth, 1)) {
+ II->setArgOperand(0, V);
+ return II;
+ }
+ if (Value *V = SimplifyDemandedVectorEltsLow(Arg1, VWidth, 1)) {
+ II->setArgOperand(1, V);
+ return II;
+ }
+ break;
+ }
+
// Constant fold ashr( <A x Bi>, Ci ).
// Constant fold lshr( <A x Bi>, Ci ).
// Constant fold shl( <A x Bi>, Ci ).
Modified: llvm/trunk/test/Transforms/InstCombine/x86-sse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/x86-sse.ll?rev=261460&r1=261459&r2=261460&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/x86-sse.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/x86-sse.ll Sat Feb 20 17:17:35 2016
@@ -210,15 +210,9 @@ define float @test_cmp_ss_0(float %a, fl
define i32 @test_comieq_ss_0(float %a, float %b) {
; CHECK-LABEL: @test_comieq_ss_0
; CHECK-NEXT: %1 = insertelement <4 x float> undef, float %a, i32 0
-; CHECK-NEXT: %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
-; CHECK-NEXT: %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
-; CHECK-NEXT: %5 = insertelement <4 x float> undef, float %b, i32 0
-; CHECK-NEXT: %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
-; CHECK-NEXT: %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
-; CHECK-NEXT: %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
-; CHECK-NEXT: %9 = tail call i32 @llvm.x86.sse.comieq.ss(<4 x float> %4, <4 x float> %8)
-; CHECK-NEXT: ret i32 %9
+; CHECK-NEXT: %2 = insertelement <4 x float> undef, float %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse.comieq.ss(<4 x float> %1, <4 x float> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <4 x float> undef, float %a, i32 0
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
@@ -234,15 +228,9 @@ define i32 @test_comieq_ss_0(float %a, f
define i32 @test_comige_ss_0(float %a, float %b) {
; CHECK-LABEL: @test_comige_ss_0
; CHECK-NEXT: %1 = insertelement <4 x float> undef, float %a, i32 0
-; CHECK-NEXT: %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
-; CHECK-NEXT: %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
-; CHECK-NEXT: %5 = insertelement <4 x float> undef, float %b, i32 0
-; CHECK-NEXT: %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
-; CHECK-NEXT: %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
-; CHECK-NEXT: %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
-; CHECK-NEXT: %9 = tail call i32 @llvm.x86.sse.comige.ss(<4 x float> %4, <4 x float> %8)
-; CHECK-NEXT: ret i32 %9
+; CHECK-NEXT: %2 = insertelement <4 x float> undef, float %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse.comige.ss(<4 x float> %1, <4 x float> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <4 x float> undef, float %a, i32 0
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
@@ -258,15 +246,9 @@ define i32 @test_comige_ss_0(float %a, f
define i32 @test_comigt_ss_0(float %a, float %b) {
; CHECK-LABEL: @test_comigt_ss_0
; CHECK-NEXT: %1 = insertelement <4 x float> undef, float %a, i32 0
-; CHECK-NEXT: %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
-; CHECK-NEXT: %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
-; CHECK-NEXT: %5 = insertelement <4 x float> undef, float %b, i32 0
-; CHECK-NEXT: %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
-; CHECK-NEXT: %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
-; CHECK-NEXT: %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
-; CHECK-NEXT: %9 = tail call i32 @llvm.x86.sse.comigt.ss(<4 x float> %4, <4 x float> %8)
-; CHECK-NEXT: ret i32 %9
+; CHECK-NEXT: %2 = insertelement <4 x float> undef, float %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse.comigt.ss(<4 x float> %1, <4 x float> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <4 x float> undef, float %a, i32 0
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
@@ -282,15 +264,9 @@ define i32 @test_comigt_ss_0(float %a, f
define i32 @test_comile_ss_0(float %a, float %b) {
; CHECK-LABEL: @test_comile_ss_0
; CHECK-NEXT: %1 = insertelement <4 x float> undef, float %a, i32 0
-; CHECK-NEXT: %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
-; CHECK-NEXT: %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
-; CHECK-NEXT: %5 = insertelement <4 x float> undef, float %b, i32 0
-; CHECK-NEXT: %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
-; CHECK-NEXT: %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
-; CHECK-NEXT: %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
-; CHECK-NEXT: %9 = tail call i32 @llvm.x86.sse.comile.ss(<4 x float> %4, <4 x float> %8)
-; CHECK-NEXT: ret i32 %9
+; CHECK-NEXT: %2 = insertelement <4 x float> undef, float %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse.comile.ss(<4 x float> %1, <4 x float> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <4 x float> undef, float %a, i32 0
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
@@ -306,15 +282,9 @@ define i32 @test_comile_ss_0(float %a, f
define i32 @test_comilt_ss_0(float %a, float %b) {
; CHECK-LABEL: @test_comilt_ss_0
; CHECK-NEXT: %1 = insertelement <4 x float> undef, float %a, i32 0
-; CHECK-NEXT: %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
-; CHECK-NEXT: %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
-; CHECK-NEXT: %5 = insertelement <4 x float> undef, float %b, i32 0
-; CHECK-NEXT: %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
-; CHECK-NEXT: %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
-; CHECK-NEXT: %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
-; CHECK-NEXT: %9 = tail call i32 @llvm.x86.sse.comilt.ss(<4 x float> %4, <4 x float> %8)
-; CHECK-NEXT: ret i32 %9
+; CHECK-NEXT: %2 = insertelement <4 x float> undef, float %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse.comilt.ss(<4 x float> %1, <4 x float> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <4 x float> undef, float %a, i32 0
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
@@ -330,15 +300,9 @@ define i32 @test_comilt_ss_0(float %a, f
define i32 @test_comineq_ss_0(float %a, float %b) {
; CHECK-LABEL: @test_comineq_ss_0
; CHECK-NEXT: %1 = insertelement <4 x float> undef, float %a, i32 0
-; CHECK-NEXT: %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
-; CHECK-NEXT: %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
-; CHECK-NEXT: %5 = insertelement <4 x float> undef, float %b, i32 0
-; CHECK-NEXT: %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
-; CHECK-NEXT: %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
-; CHECK-NEXT: %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
-; CHECK-NEXT: %9 = tail call i32 @llvm.x86.sse.comineq.ss(<4 x float> %4, <4 x float> %8)
-; CHECK-NEXT: ret i32 %9
+; CHECK-NEXT: %2 = insertelement <4 x float> undef, float %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse.comineq.ss(<4 x float> %1, <4 x float> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <4 x float> undef, float %a, i32 0
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
@@ -354,15 +318,9 @@ define i32 @test_comineq_ss_0(float %a,
define i32 @test_ucomieq_ss_0(float %a, float %b) {
; CHECK-LABEL: @test_ucomieq_ss_0
; CHECK-NEXT: %1 = insertelement <4 x float> undef, float %a, i32 0
-; CHECK-NEXT: %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
-; CHECK-NEXT: %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
-; CHECK-NEXT: %5 = insertelement <4 x float> undef, float %b, i32 0
-; CHECK-NEXT: %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
-; CHECK-NEXT: %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
-; CHECK-NEXT: %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
-; CHECK-NEXT: %9 = tail call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> %4, <4 x float> %8)
-; CHECK-NEXT: ret i32 %9
+; CHECK-NEXT: %2 = insertelement <4 x float> undef, float %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> %1, <4 x float> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <4 x float> undef, float %a, i32 0
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
@@ -378,15 +336,9 @@ define i32 @test_ucomieq_ss_0(float %a,
define i32 @test_ucomige_ss_0(float %a, float %b) {
; CHECK-LABEL: @test_ucomige_ss_0
; CHECK-NEXT: %1 = insertelement <4 x float> undef, float %a, i32 0
-; CHECK-NEXT: %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
-; CHECK-NEXT: %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
-; CHECK-NEXT: %5 = insertelement <4 x float> undef, float %b, i32 0
-; CHECK-NEXT: %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
-; CHECK-NEXT: %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
-; CHECK-NEXT: %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
-; CHECK-NEXT: %9 = tail call i32 @llvm.x86.sse.ucomige.ss(<4 x float> %4, <4 x float> %8)
-; CHECK-NEXT: ret i32 %9
+; CHECK-NEXT: %2 = insertelement <4 x float> undef, float %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse.ucomige.ss(<4 x float> %1, <4 x float> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <4 x float> undef, float %a, i32 0
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
@@ -402,15 +354,9 @@ define i32 @test_ucomige_ss_0(float %a,
define i32 @test_ucomigt_ss_0(float %a, float %b) {
; CHECK-LABEL: @test_ucomigt_ss_0
; CHECK-NEXT: %1 = insertelement <4 x float> undef, float %a, i32 0
-; CHECK-NEXT: %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
-; CHECK-NEXT: %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
-; CHECK-NEXT: %5 = insertelement <4 x float> undef, float %b, i32 0
-; CHECK-NEXT: %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
-; CHECK-NEXT: %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
-; CHECK-NEXT: %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
-; CHECK-NEXT: %9 = tail call i32 @llvm.x86.sse.ucomigt.ss(<4 x float> %4, <4 x float> %8)
-; CHECK-NEXT: ret i32 %9
+; CHECK-NEXT: %2 = insertelement <4 x float> undef, float %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse.ucomigt.ss(<4 x float> %1, <4 x float> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <4 x float> undef, float %a, i32 0
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
@@ -426,15 +372,9 @@ define i32 @test_ucomigt_ss_0(float %a,
define i32 @test_ucomile_ss_0(float %a, float %b) {
; CHECK-LABEL: @test_ucomile_ss_0
; CHECK-NEXT: %1 = insertelement <4 x float> undef, float %a, i32 0
-; CHECK-NEXT: %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
-; CHECK-NEXT: %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
-; CHECK-NEXT: %5 = insertelement <4 x float> undef, float %b, i32 0
-; CHECK-NEXT: %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
-; CHECK-NEXT: %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
-; CHECK-NEXT: %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
-; CHECK-NEXT: %9 = tail call i32 @llvm.x86.sse.ucomile.ss(<4 x float> %4, <4 x float> %8)
-; CHECK-NEXT: ret i32 %9
+; CHECK-NEXT: %2 = insertelement <4 x float> undef, float %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse.ucomile.ss(<4 x float> %1, <4 x float> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <4 x float> undef, float %a, i32 0
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
@@ -450,15 +390,9 @@ define i32 @test_ucomile_ss_0(float %a,
define i32 @test_ucomilt_ss_0(float %a, float %b) {
; CHECK-LABEL: @test_ucomilt_ss_0
; CHECK-NEXT: %1 = insertelement <4 x float> undef, float %a, i32 0
-; CHECK-NEXT: %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
-; CHECK-NEXT: %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
-; CHECK-NEXT: %5 = insertelement <4 x float> undef, float %b, i32 0
-; CHECK-NEXT: %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
-; CHECK-NEXT: %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
-; CHECK-NEXT: %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
-; CHECK-NEXT: %9 = tail call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> %4, <4 x float> %8)
-; CHECK-NEXT: ret i32 %9
+; CHECK-NEXT: %2 = insertelement <4 x float> undef, float %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse.ucomilt.ss(<4 x float> %1, <4 x float> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <4 x float> undef, float %a, i32 0
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
@@ -474,15 +408,9 @@ define i32 @test_ucomilt_ss_0(float %a,
define i32 @test_ucomineq_ss_0(float %a, float %b) {
; CHECK-LABEL: @test_ucomineq_ss_0
; CHECK-NEXT: %1 = insertelement <4 x float> undef, float %a, i32 0
-; CHECK-NEXT: %2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
-; CHECK-NEXT: %4 = insertelement <4 x float> %3, float 3.000000e+00, i32 3
-; CHECK-NEXT: %5 = insertelement <4 x float> undef, float %b, i32 0
-; CHECK-NEXT: %6 = insertelement <4 x float> %5, float 4.000000e+00, i32 1
-; CHECK-NEXT: %7 = insertelement <4 x float> %6, float 5.000000e+00, i32 2
-; CHECK-NEXT: %8 = insertelement <4 x float> %7, float 6.000000e+00, i32 3
-; CHECK-NEXT: %9 = tail call i32 @llvm.x86.sse.ucomineq.ss(<4 x float> %4, <4 x float> %8)
-; CHECK-NEXT: ret i32 %9
+; CHECK-NEXT: %2 = insertelement <4 x float> undef, float %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse.ucomineq.ss(<4 x float> %1, <4 x float> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <4 x float> undef, float %a, i32 0
%2 = insertelement <4 x float> %1, float 1.000000e+00, i32 1
%3 = insertelement <4 x float> %2, float 2.000000e+00, i32 2
Modified: llvm/trunk/test/Transforms/InstCombine/x86-sse2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/x86-sse2.ll?rev=261460&r1=261459&r2=261460&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/x86-sse2.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/x86-sse2.ll Sat Feb 20 17:17:35 2016
@@ -130,11 +130,9 @@ define double @test_cmp_sd_0(double %a,
define i32 @test_comieq_sd_0(double %a, double %b) {
; CHECK-LABEL: @test_comieq_sd_0
; CHECK-NEXT: %1 = insertelement <2 x double> undef, double %a, i32 0
-; CHECK-NEXT: %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <2 x double> undef, double %b, i32 0
-; CHECK-NEXT: %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
-; CHECK-NEXT: %5 = tail call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %2, <2 x double> %4)
-; CHECK-NEXT: ret i32 %5
+; CHECK-NEXT: %2 = insertelement <2 x double> undef, double %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %1, <2 x double> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <2 x double> undef, double %a, i32 0
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
%3 = insertelement <2 x double> undef, double %b, i32 0
@@ -146,11 +144,9 @@ define i32 @test_comieq_sd_0(double %a,
define i32 @test_comige_sd_0(double %a, double %b) {
; CHECK-LABEL: @test_comige_sd_0
; CHECK-NEXT: %1 = insertelement <2 x double> undef, double %a, i32 0
-; CHECK-NEXT: %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <2 x double> undef, double %b, i32 0
-; CHECK-NEXT: %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
-; CHECK-NEXT: %5 = tail call i32 @llvm.x86.sse2.comige.sd(<2 x double> %2, <2 x double> %4)
-; CHECK-NEXT: ret i32 %5
+; CHECK-NEXT: %2 = insertelement <2 x double> undef, double %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse2.comige.sd(<2 x double> %1, <2 x double> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <2 x double> undef, double %a, i32 0
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
%3 = insertelement <2 x double> undef, double %b, i32 0
@@ -162,11 +158,9 @@ define i32 @test_comige_sd_0(double %a,
define i32 @test_comigt_sd_0(double %a, double %b) {
; CHECK-LABEL: @test_comigt_sd_0
; CHECK-NEXT: %1 = insertelement <2 x double> undef, double %a, i32 0
-; CHECK-NEXT: %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <2 x double> undef, double %b, i32 0
-; CHECK-NEXT: %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
-; CHECK-NEXT: %5 = tail call i32 @llvm.x86.sse2.comigt.sd(<2 x double> %2, <2 x double> %4)
-; CHECK-NEXT: ret i32 %5
+; CHECK-NEXT: %2 = insertelement <2 x double> undef, double %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse2.comigt.sd(<2 x double> %1, <2 x double> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <2 x double> undef, double %a, i32 0
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
%3 = insertelement <2 x double> undef, double %b, i32 0
@@ -178,11 +172,9 @@ define i32 @test_comigt_sd_0(double %a,
define i32 @test_comile_sd_0(double %a, double %b) {
; CHECK-LABEL: @test_comile_sd_0
; CHECK-NEXT: %1 = insertelement <2 x double> undef, double %a, i32 0
-; CHECK-NEXT: %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <2 x double> undef, double %b, i32 0
-; CHECK-NEXT: %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
-; CHECK-NEXT: %5 = tail call i32 @llvm.x86.sse2.comile.sd(<2 x double> %2, <2 x double> %4)
-; CHECK-NEXT: ret i32 %5
+; CHECK-NEXT: %2 = insertelement <2 x double> undef, double %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse2.comile.sd(<2 x double> %1, <2 x double> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <2 x double> undef, double %a, i32 0
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
%3 = insertelement <2 x double> undef, double %b, i32 0
@@ -194,11 +186,9 @@ define i32 @test_comile_sd_0(double %a,
define i32 @test_comilt_sd_0(double %a, double %b) {
; CHECK-LABEL: @test_comilt_sd_0
; CHECK-NEXT: %1 = insertelement <2 x double> undef, double %a, i32 0
-; CHECK-NEXT: %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <2 x double> undef, double %b, i32 0
-; CHECK-NEXT: %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
-; CHECK-NEXT: %5 = tail call i32 @llvm.x86.sse2.comilt.sd(<2 x double> %2, <2 x double> %4)
-; CHECK-NEXT: ret i32 %5
+; CHECK-NEXT: %2 = insertelement <2 x double> undef, double %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse2.comilt.sd(<2 x double> %1, <2 x double> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <2 x double> undef, double %a, i32 0
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
%3 = insertelement <2 x double> undef, double %b, i32 0
@@ -210,11 +200,9 @@ define i32 @test_comilt_sd_0(double %a,
define i32 @test_comineq_sd_0(double %a, double %b) {
; CHECK-LABEL: @test_comineq_sd_0
; CHECK-NEXT: %1 = insertelement <2 x double> undef, double %a, i32 0
-; CHECK-NEXT: %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <2 x double> undef, double %b, i32 0
-; CHECK-NEXT: %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
-; CHECK-NEXT: %5 = tail call i32 @llvm.x86.sse2.comineq.sd(<2 x double> %2, <2 x double> %4)
-; CHECK-NEXT: ret i32 %5
+; CHECK-NEXT: %2 = insertelement <2 x double> undef, double %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse2.comineq.sd(<2 x double> %1, <2 x double> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <2 x double> undef, double %a, i32 0
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
%3 = insertelement <2 x double> undef, double %b, i32 0
@@ -226,11 +214,9 @@ define i32 @test_comineq_sd_0(double %a,
define i32 @test_ucomieq_sd_0(double %a, double %b) {
; CHECK-LABEL: @test_ucomieq_sd_0
; CHECK-NEXT: %1 = insertelement <2 x double> undef, double %a, i32 0
-; CHECK-NEXT: %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <2 x double> undef, double %b, i32 0
-; CHECK-NEXT: %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
-; CHECK-NEXT: %5 = tail call i32 @llvm.x86.sse2.ucomieq.sd(<2 x double> %2, <2 x double> %4)
-; CHECK-NEXT: ret i32 %5
+; CHECK-NEXT: %2 = insertelement <2 x double> undef, double %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse2.ucomieq.sd(<2 x double> %1, <2 x double> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <2 x double> undef, double %a, i32 0
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
%3 = insertelement <2 x double> undef, double %b, i32 0
@@ -242,11 +228,9 @@ define i32 @test_ucomieq_sd_0(double %a,
define i32 @test_ucomige_sd_0(double %a, double %b) {
; CHECK-LABEL: @test_ucomige_sd_0
; CHECK-NEXT: %1 = insertelement <2 x double> undef, double %a, i32 0
-; CHECK-NEXT: %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <2 x double> undef, double %b, i32 0
-; CHECK-NEXT: %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
-; CHECK-NEXT: %5 = tail call i32 @llvm.x86.sse2.ucomige.sd(<2 x double> %2, <2 x double> %4)
-; CHECK-NEXT: ret i32 %5
+; CHECK-NEXT: %2 = insertelement <2 x double> undef, double %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse2.ucomige.sd(<2 x double> %1, <2 x double> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <2 x double> undef, double %a, i32 0
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
%3 = insertelement <2 x double> undef, double %b, i32 0
@@ -258,11 +242,9 @@ define i32 @test_ucomige_sd_0(double %a,
define i32 @test_ucomigt_sd_0(double %a, double %b) {
; CHECK-LABEL: @test_ucomigt_sd_0
; CHECK-NEXT: %1 = insertelement <2 x double> undef, double %a, i32 0
-; CHECK-NEXT: %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <2 x double> undef, double %b, i32 0
-; CHECK-NEXT: %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
-; CHECK-NEXT: %5 = tail call i32 @llvm.x86.sse2.ucomigt.sd(<2 x double> %2, <2 x double> %4)
-; CHECK-NEXT: ret i32 %5
+; CHECK-NEXT: %2 = insertelement <2 x double> undef, double %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse2.ucomigt.sd(<2 x double> %1, <2 x double> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <2 x double> undef, double %a, i32 0
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
%3 = insertelement <2 x double> undef, double %b, i32 0
@@ -274,11 +256,9 @@ define i32 @test_ucomigt_sd_0(double %a,
define i32 @test_ucomile_sd_0(double %a, double %b) {
; CHECK-LABEL: @test_ucomile_sd_0
; CHECK-NEXT: %1 = insertelement <2 x double> undef, double %a, i32 0
-; CHECK-NEXT: %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <2 x double> undef, double %b, i32 0
-; CHECK-NEXT: %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
-; CHECK-NEXT: %5 = tail call i32 @llvm.x86.sse2.ucomile.sd(<2 x double> %2, <2 x double> %4)
-; CHECK-NEXT: ret i32 %5
+; CHECK-NEXT: %2 = insertelement <2 x double> undef, double %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse2.ucomile.sd(<2 x double> %1, <2 x double> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <2 x double> undef, double %a, i32 0
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
%3 = insertelement <2 x double> undef, double %b, i32 0
@@ -290,11 +270,9 @@ define i32 @test_ucomile_sd_0(double %a,
define i32 @test_ucomilt_sd_0(double %a, double %b) {
; CHECK-LABEL: @test_ucomilt_sd_0
; CHECK-NEXT: %1 = insertelement <2 x double> undef, double %a, i32 0
-; CHECK-NEXT: %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <2 x double> undef, double %b, i32 0
-; CHECK-NEXT: %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
-; CHECK-NEXT: %5 = tail call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> %2, <2 x double> %4)
-; CHECK-NEXT: ret i32 %5
+; CHECK-NEXT: %2 = insertelement <2 x double> undef, double %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> %1, <2 x double> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <2 x double> undef, double %a, i32 0
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
%3 = insertelement <2 x double> undef, double %b, i32 0
@@ -306,11 +284,9 @@ define i32 @test_ucomilt_sd_0(double %a,
define i32 @test_ucomineq_sd_0(double %a, double %b) {
; CHECK-LABEL: @test_ucomineq_sd_0
; CHECK-NEXT: %1 = insertelement <2 x double> undef, double %a, i32 0
-; CHECK-NEXT: %2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
-; CHECK-NEXT: %3 = insertelement <2 x double> undef, double %b, i32 0
-; CHECK-NEXT: %4 = insertelement <2 x double> %3, double 2.000000e+00, i32 1
-; CHECK-NEXT: %5 = tail call i32 @llvm.x86.sse2.ucomineq.sd(<2 x double> %2, <2 x double> %4)
-; CHECK-NEXT: ret i32 %5
+; CHECK-NEXT: %2 = insertelement <2 x double> undef, double %b, i32 0
+; CHECK-NEXT: %3 = tail call i32 @llvm.x86.sse2.ucomineq.sd(<2 x double> %1, <2 x double> %2)
+; CHECK-NEXT: ret i32 %3
%1 = insertelement <2 x double> undef, double %a, i32 0
%2 = insertelement <2 x double> %1, double 1.000000e+00, i32 1
%3 = insertelement <2 x double> undef, double %b, i32 0
@@ -328,17 +304,17 @@ declare <2 x double> @llvm.x86.sse2.div.
declare <2 x double> @llvm.x86.sse2.min.sd(<2 x double>, <2 x double>)
declare <2 x double> @llvm.x86.sse2.max.sd(<2 x double>, <2 x double>)
declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8)
-
-declare i32 @llvm.x86.sse2.comieq.sd(<2 x double>, <2 x double>)
-declare i32 @llvm.x86.sse2.comige.sd(<2 x double>, <2 x double>)
-declare i32 @llvm.x86.sse2.comigt.sd(<2 x double>, <2 x double>)
-declare i32 @llvm.x86.sse2.comile.sd(<2 x double>, <2 x double>)
-declare i32 @llvm.x86.sse2.comilt.sd(<2 x double>, <2 x double>)
-declare i32 @llvm.x86.sse2.comineq.sd(<2 x double>, <2 x double>)
-
-declare i32 @llvm.x86.sse2.ucomieq.sd(<2 x double>, <2 x double>)
-declare i32 @llvm.x86.sse2.ucomige.sd(<2 x double>, <2 x double>)
-declare i32 @llvm.x86.sse2.ucomigt.sd(<2 x double>, <2 x double>)
-declare i32 @llvm.x86.sse2.ucomile.sd(<2 x double>, <2 x double>)
-declare i32 @llvm.x86.sse2.ucomilt.sd(<2 x double>, <2 x double>)
-declare i32 @llvm.x86.sse2.ucomineq.sd(<2 x double>, <2 x double>)
+
+declare i32 @llvm.x86.sse2.comieq.sd(<2 x double>, <2 x double>)
+declare i32 @llvm.x86.sse2.comige.sd(<2 x double>, <2 x double>)
+declare i32 @llvm.x86.sse2.comigt.sd(<2 x double>, <2 x double>)
+declare i32 @llvm.x86.sse2.comile.sd(<2 x double>, <2 x double>)
+declare i32 @llvm.x86.sse2.comilt.sd(<2 x double>, <2 x double>)
+declare i32 @llvm.x86.sse2.comineq.sd(<2 x double>, <2 x double>)
+
+declare i32 @llvm.x86.sse2.ucomieq.sd(<2 x double>, <2 x double>)
+declare i32 @llvm.x86.sse2.ucomige.sd(<2 x double>, <2 x double>)
+declare i32 @llvm.x86.sse2.ucomigt.sd(<2 x double>, <2 x double>)
+declare i32 @llvm.x86.sse2.ucomile.sd(<2 x double>, <2 x double>)
+declare i32 @llvm.x86.sse2.ucomilt.sd(<2 x double>, <2 x double>)
+declare i32 @llvm.x86.sse2.ucomineq.sd(<2 x double>, <2 x double>)
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