[llvm] r261286 - When printing MIR, output to errs() rather than outs().
Justin Lebar via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 18 16:18:47 PST 2016
Author: jlebar
Date: Thu Feb 18 18:18:46 2016
New Revision: 261286
URL: http://llvm.org/viewvc/llvm-project?rev=261286&view=rev
Log:
When printing MIR, output to errs() rather than outs().
Summary:
Without this, this command
$ llvm-run llc -stop-after machine-cp -o - <( echo '' )
outputs an error, because we close stdout twice -- once when closing the
file opened for "-o", and again when closing outs().
Also clarify in the outs() definition that you can't ever call it if you
want to open your own raw_fd_ostream on stdout.
Reviewers: jroelofs, tstellarAMD
Subscribers: jholewinski, qcolombet, dsanders, llvm-commits
Differential Revision: http://reviews.llvm.org/D17422
Modified:
llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
llvm/trunk/lib/Support/raw_ostream.cpp
llvm/trunk/test/CodeGen/AArch64/branch-folder-merge-mmos.ll
llvm/trunk/test/CodeGen/AArch64/stackmap-frame-setup.ll
llvm/trunk/test/CodeGen/ARM/thumb1-ldst-opt.ll
llvm/trunk/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
llvm/trunk/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
llvm/trunk/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
llvm/trunk/test/CodeGen/MIR/AArch64/target-flags.mir
llvm/trunk/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
llvm/trunk/test/CodeGen/MIR/ARM/bundled-instructions.mir
llvm/trunk/test/CodeGen/MIR/ARM/cfi-same-value.mir
llvm/trunk/test/CodeGen/MIR/Generic/basic-blocks.mir
llvm/trunk/test/CodeGen/MIR/Generic/frame-info.mir
llvm/trunk/test/CodeGen/MIR/Generic/llvmIR.mir
llvm/trunk/test/CodeGen/MIR/Generic/llvmIRMissing.mir
llvm/trunk/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir
llvm/trunk/test/CodeGen/MIR/Generic/machine-function.mir
llvm/trunk/test/CodeGen/MIR/Generic/register-info.mir
llvm/trunk/test/CodeGen/MIR/Mips/memory-operands.mir
llvm/trunk/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
llvm/trunk/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
llvm/trunk/test/CodeGen/MIR/X86/basic-block-liveins.mir
llvm/trunk/test/CodeGen/MIR/X86/block-address-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/callee-saved-info.mir
llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
llvm/trunk/test/CodeGen/MIR/X86/cfi-offset.mir
llvm/trunk/test/CodeGen/MIR/X86/constant-pool.mir
llvm/trunk/test/CodeGen/MIR/X86/dead-register-flag.mir
llvm/trunk/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-objects.mir
llvm/trunk/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
llvm/trunk/test/CodeGen/MIR/X86/frame-info-stack-references.mir
llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
llvm/trunk/test/CodeGen/MIR/X86/function-liveins.mir
llvm/trunk/test/CodeGen/MIR/X86/global-value-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir
llvm/trunk/test/CodeGen/MIR/X86/inline-asm-registers.mir
llvm/trunk/test/CodeGen/MIR/X86/instructions-debug-location.mir
llvm/trunk/test/CodeGen/MIR/X86/jump-table-info.mir
llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir
llvm/trunk/test/CodeGen/MIR/X86/liveout-register-mask.mir
llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/machine-instructions.mir
llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/metadata-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/named-registers.mir
llvm/trunk/test/CodeGen/MIR/X86/newline-handling.mir
llvm/trunk/test/CodeGen/MIR/X86/null-register-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/register-mask-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir
llvm/trunk/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
llvm/trunk/test/CodeGen/MIR/X86/stack-object-debug-info.mir
llvm/trunk/test/CodeGen/MIR/X86/stack-object-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/stack-objects.mir
llvm/trunk/test/CodeGen/MIR/X86/subregister-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks.mir
llvm/trunk/test/CodeGen/MIR/X86/undef-register-flag.mir
llvm/trunk/test/CodeGen/MIR/X86/used-physical-register-info.mir
llvm/trunk/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir
llvm/trunk/test/CodeGen/PowerPC/stackmap-frame-setup.ll
llvm/trunk/test/CodeGen/X86/expand-vr64-gr64-copy.mir
llvm/trunk/test/CodeGen/X86/stackmap-frame-setup.ll
llvm/trunk/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll
llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir
llvm/trunk/test/DebugInfo/X86/bbjoin.ll
llvm/trunk/test/DebugInfo/X86/safestack-byval.ll
Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Thu Feb 18 18:18:46 2016
@@ -165,7 +165,7 @@ bool LLVMTargetMachine::addPassesToEmitF
return true;
if (StopAfter) {
- PM.add(createPrintMIRPass(outs()));
+ PM.add(createPrintMIRPass(errs()));
return false;
}
Modified: llvm/trunk/lib/Support/raw_ostream.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/raw_ostream.cpp?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/lib/Support/raw_ostream.cpp (original)
+++ llvm/trunk/lib/Support/raw_ostream.cpp Thu Feb 18 18:18:46 2016
@@ -715,9 +715,10 @@ bool raw_fd_ostream::has_colors() const
/// outs() - This returns a reference to a raw_ostream for standard output.
/// Use it like: outs() << "foo" << "bar";
raw_ostream &llvm::outs() {
- // Set buffer settings to model stdout behavior.
- // Delete the file descriptor when the program exits, forcing error
- // detection. If you don't want this behavior, don't use outs().
+ // Set buffer settings to model stdout behavior. Delete the file descriptor
+ // when the program exits, forcing error detection. This means that if you
+ // ever call outs(), you can't open another raw_fd_ostream on stdout, as we'll
+ // close stdout twice and print an error the second time.
std::error_code EC;
static raw_fd_ostream S("-", EC, sys::fs::F_None);
assert(!EC);
Modified: llvm/trunk/test/CodeGen/AArch64/branch-folder-merge-mmos.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/branch-folder-merge-mmos.ll?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/branch-folder-merge-mmos.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/branch-folder-merge-mmos.ll Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-; RUN: llc -march=aarch64 -mtriple=aarch64-none-linux-gnu -stop-after branch-folder -o /dev/null < %s | FileCheck %s
+; RUN: llc -march=aarch64 -mtriple=aarch64-none-linux-gnu -stop-after branch-folder -o /dev/null < %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
; Function Attrs: norecurse nounwind
Modified: llvm/trunk/test/CodeGen/AArch64/stackmap-frame-setup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/stackmap-frame-setup.ll?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/stackmap-frame-setup.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/stackmap-frame-setup.ll Thu Feb 18 18:18:46 2016
@@ -1,5 +1,5 @@
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL
define void @caller_meta_leaf() {
entry:
Modified: llvm/trunk/test/CodeGen/ARM/thumb1-ldst-opt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/thumb1-ldst-opt.ll?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/thumb1-ldst-opt.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/thumb1-ldst-opt.ll Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-; RUN: llc -stop-after block-placement -o /dev/null %s | FileCheck %s
+; RUN: llc -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s
target triple = "thumbv6m-none-none"
Modified: llvm/trunk/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/AArch64/cfi-def-cfa.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_def_cfa operands
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/AArch64/multiple-lhs-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser can parse multiple register machine
# operands before '='.
Modified: llvm/trunk/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
--- |
@var = global i64 0
Modified: llvm/trunk/test/CodeGen/MIR/AArch64/target-flags.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AArch64/target-flags.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/target-flags.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/AArch64/target-flags.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
--- |
Modified: llvm/trunk/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AMDGPU/target-index-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AMDGPU/target-index-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/AMDGPU/target-index-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o /dev/null %s | FileCheck %s
+# RUN: llc -march=amdgcn -mcpu=SI -start-after postrapseudos -stop-after postrapseudos -o /dev/null %s 2>&1 | FileCheck %s
# This test verifies that the MIR parser can parse target index operands.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/ARM/bundled-instructions.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/ARM/bundled-instructions.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/bundled-instructions.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/ARM/bundled-instructions.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple thumbv7-apple-ios -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the bundled machine instructions
# and 'internal' register flags correctly.
Modified: llvm/trunk/test/CodeGen/MIR/ARM/cfi-same-value.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/ARM/cfi-same-value.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/ARM/cfi-same-value.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/ARM/cfi-same-value.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=arm-linux-unknown-gnueabi -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple=arm-linux-unknown-gnueabi -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
--- |
declare void @dummy_use(i32*, i32)
Modified: llvm/trunk/test/CodeGen/MIR/Generic/basic-blocks.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/Generic/basic-blocks.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/basic-blocks.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/Generic/basic-blocks.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses machine functions correctly.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/Generic/frame-info.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/Generic/frame-info.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/frame-info.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/Generic/frame-info.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses machine frame info properties
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/Generic/llvmIR.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/Generic/llvmIR.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/llvmIR.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/Generic/llvmIR.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the LLVM IR that's embedded with MIR is parsed
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/Generic/llvmIRMissing.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/Generic/llvmIRMissing.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/llvmIRMissing.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/Generic/llvmIRMissing.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 2>&1 | FileCheck %s
# This test ensures that the MIR parser accepts files without the LLVM IR.
---
Modified: llvm/trunk/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 2>&1 | FileCheck %s
# This test ensures that the MIR parser preserves unnamed LLVM IR block
# references.
Modified: llvm/trunk/test/CodeGen/MIR/Generic/machine-function.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/Generic/machine-function.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/machine-function.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/Generic/machine-function.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses machine functions correctly.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/Generic/register-info.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/Generic/register-info.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/Generic/register-info.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/Generic/register-info.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses machine register info properties
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/Mips/memory-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/Mips/memory-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/Mips/memory-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/Mips/memory-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the call entry pseudo source
# values in memory operands correctly.
Modified: llvm/trunk/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=nvptx -mcpu=sm_20 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=nvptx -mcpu=sm_20 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses floating point constant operands
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -mtriple=powerpc64-unknown-linux-gnu -start-after machine-combiner -stop-after machine-combiner -o /dev/null %s | FileCheck %s
+# RUN: llc -mtriple=powerpc64-unknown-linux-gnu -start-after machine-combiner -stop-after machine-combiner -o /dev/null %s 2>&1 | FileCheck %s
# PR24724
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/basic-block-liveins.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/basic-block-liveins.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/basic-block-liveins.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/basic-block-liveins.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses basic block liveins correctly.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/block-address-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/block-address-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/block-address-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/block-address-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the block address operands
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/callee-saved-info.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/callee-saved-info.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/callee-saved-info.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/callee-saved-info.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after prologepilog -stop-after prologepilog -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after prologepilog -stop-after prologepilog -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses callee saved information in the
# stack objects correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_def_cfa_offset operands
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/cfi-def-cfa-register.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_def_cfa_register
# operands correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/cfi-offset.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/cfi-offset.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/cfi-offset.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/cfi-offset.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the .cfi_offset operands
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/constant-pool.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/constant-pool.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/constant-pool.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/constant-pool.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses constant pool constants and
# constant pool operands correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/dead-register-flag.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/dead-register-flag.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/dead-register-flag.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/dead-register-flag.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the 'dead' register flags
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/early-clobber-register-flag.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/early-clobber-register-flag.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/early-clobber-register-flag.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/early-clobber-register-flag.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the 'early-clobber' register
# flags correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the external symbol machine
# operands correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-memory-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses fixed stack memory operands
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-objects.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-objects.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-objects.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-objects.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses fixed stack objects correctly.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/frame-info-save-restore-points.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -enable-shrink-wrap=true -start-after shrink-wrap -stop-after shrink-wrap -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -enable-shrink-wrap=true -start-after shrink-wrap -stop-after shrink-wrap -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the save and restore points in
# the machine frame info correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/frame-info-stack-references.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/frame-info-stack-references.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/frame-info-stack-references.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/frame-info-stack-references.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the stack protector stack
# object reference in the machine frame info correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/frame-setup-instruction-flag.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the frame setup instruction flag.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/function-liveins.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/function-liveins.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/function-liveins.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/function-liveins.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses machine function's liveins
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/global-value-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/global-value-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/global-value-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/global-value-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses global value operands correctly.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses immediate machine operands.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the 'implicit' and 'implicit-def'
# register flags correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/inline-asm-registers.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/inline-asm-registers.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/inline-asm-registers.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/inline-asm-registers.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after block-placement -stop-after block-placement -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after block-placement -stop-after block-placement -o /dev/null %s 2>&1 | FileCheck %s
--- |
define i64 @test(i64 %x, i64 %y) #0 {
Modified: llvm/trunk/test/CodeGen/MIR/X86/instructions-debug-location.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/instructions-debug-location.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/instructions-debug-location.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/instructions-debug-location.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the machine instruction's
# debug location metadata correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/jump-table-info.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/jump-table-info.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/jump-table-info.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/jump-table-info.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the jump table info and jump
# table operands correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the 'killed' register flags
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/liveout-register-mask.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/liveout-register-mask.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/liveout-register-mask.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/liveout-register-mask.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after stackmap-liveness -stop-after stackmap-liveness -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after stackmap-liveness -stop-after stackmap-liveness -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the liveout register mask
# machine operands correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses machine basic block operands.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/machine-instructions.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/machine-instructions.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/machine-instructions.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/machine-instructions.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses X86 machine instructions
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/memory-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the machine memory operands
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/metadata-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/metadata-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/metadata-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/metadata-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the metadata machine operands
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/named-registers.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/named-registers.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/named-registers.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/named-registers.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses X86 registers correctly.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/newline-handling.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/newline-handling.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/newline-handling.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/newline-handling.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/null-register-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/null-register-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/null-register-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/null-register-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses null register operands correctly.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/register-mask-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/register-mask-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/register-mask-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/register-mask-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses register mask operands correctly.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/simple-register-allocation-hints.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-scheduler -stop-after machine-scheduler -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-scheduler -stop-after machine-scheduler -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses simple register allocation hints
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses fixed stack objects correctly.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/stack-object-debug-info.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/stack-object-debug-info.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/stack-object-debug-info.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/stack-object-debug-info.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the stack object's debug info
# correctly.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/stack-object-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/stack-object-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/stack-object-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/stack-object-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses stack object machine operands
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/stack-objects.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/stack-objects.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/stack-objects.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/stack-objects.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses stack objects correctly.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/subregister-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/subregister-operands.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/subregister-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/subregister-operands.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses subregisters in register operands
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks-weights.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses basic block successors and
# probabilities correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/successor-basic-blocks.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses basic block successors correctly.
--- |
Modified: llvm/trunk/test/CodeGen/MIR/X86/undef-register-flag.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/undef-register-flag.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/undef-register-flag.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/undef-register-flag.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the 'undef' register flags
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/used-physical-register-info.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/used-physical-register-info.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/used-physical-register-info.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/used-physical-register-info.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses the callee saved register mask
# correctly and that the MIR parser can infer it as well.
Modified: llvm/trunk/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses variable sized stack objects
# correctly.
Modified: llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s | FileCheck %s
+# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o /dev/null %s 2>&1 | FileCheck %s
# This test ensures that the MIR parser parses virtual register definitions and
# references correctly.
Modified: llvm/trunk/test/CodeGen/PowerPC/stackmap-frame-setup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/stackmap-frame-setup.ll?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/stackmap-frame-setup.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/stackmap-frame-setup.ll Thu Feb 18 18:18:46 2016
@@ -1,5 +1,5 @@
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=powerpc64-unknown-gnu-linux -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL
define void @caller_meta_leaf() {
entry:
Modified: llvm/trunk/test/CodeGen/X86/expand-vr64-gr64-copy.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/expand-vr64-gr64-copy.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/expand-vr64-gr64-copy.mir (original)
+++ llvm/trunk/test/CodeGen/X86/expand-vr64-gr64-copy.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass postrapseudos -mtriple=x86_64-unknown-unknown -mattr=+3dnow -o /dev/null %s | FileCheck %s
+# RUN: llc -run-pass postrapseudos -mtriple=x86_64-unknown-unknown -mattr=+3dnow -o /dev/null %s 2>&1 | FileCheck %s
# This test verifies that the ExpandPostRA pass expands the GR64 <-> VR64
# copies into appropriate MMX_MOV instructions.
Modified: llvm/trunk/test/CodeGen/X86/stackmap-frame-setup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stackmap-frame-setup.ll?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stackmap-frame-setup.ll (original)
+++ llvm/trunk/test/CodeGen/X86/stackmap-frame-setup.ll Thu Feb 18 18:18:46 2016
@@ -1,5 +1,5 @@
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
-; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=ISEL
+; RUN: llc -o /dev/null -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s 2>&1 | FileCheck %s --check-prefix=FAST-ISEL
define void @caller_meta_leaf() {
entry:
Modified: llvm/trunk/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll (original)
+++ llvm/trunk/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll Thu Feb 18 18:18:46 2016
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after machine-scheduler %s | FileCheck %s --check-prefix=PRE-RA
-; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after prologepilog %s | FileCheck %s --check-prefix=POST-RA
+; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after machine-scheduler %s 2>&1 | FileCheck %s --check-prefix=PRE-RA
+; RUN: llc -mtriple=x86_64-unknown-unknown -o /dev/null -stop-after prologepilog %s 2>&1 | FileCheck %s --check-prefix=POST-RA
; This test verifies that the virtual register references in machine function's
; liveins are cleared after register allocation.
Modified: llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s | FileCheck %s
+# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s 2>&1 | FileCheck %s
# Test the extension of debug ranges from 3 predecessors.
# Generated from the source file LiveDebugValues-3preds.c:
Modified: llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir Thu Feb 18 18:18:46 2016
@@ -1,4 +1,4 @@
-# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s | FileCheck %s
+# RUN: llc -run-pass=livedebugvalues -march=x86-64 -o /dev/null %s 2>&1 | FileCheck %s
# Test the extension of debug ranges from predecessors.
# Generated from the source file LiveDebugValues.c:
Modified: llvm/trunk/test/DebugInfo/X86/bbjoin.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/bbjoin.ll?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/bbjoin.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/bbjoin.ll Thu Feb 18 18:18:46 2016
@@ -1,5 +1,5 @@
; RUN: llc -mtriple=x86_64-apple-macosx10.9.0 %s -stop-after=livedebugvars \
-; RUN: -o %t.s | FileCheck %s
+; RUN: -o %t.s 2>&1 | FileCheck %s
; Generated from:
; void g(int *);
; int f() {
Modified: llvm/trunk/test/DebugInfo/X86/safestack-byval.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/safestack-byval.ll?rev=261286&r1=261285&r2=261286&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/safestack-byval.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/safestack-byval.ll Thu Feb 18 18:18:46 2016
@@ -1,7 +1,7 @@
; Test dwarf codegen for DILocalVariable of a byval function argument that
; points to neither an argument nor an alloca. This kind of IR is generated by
; SafeStack for unsafe byval arguments.
-; RUN: llc -mtriple=x86_64-unknown-unknown -stop-after expand-isel-pseudos %s -o /dev/null | FileCheck %s
+; RUN: llc -mtriple=x86_64-unknown-unknown -stop-after expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s
; This was built by compiling the following source with SafeStack and
; simplifying the result a little.
More information about the llvm-commits
mailing list