[llvm] r261235 - Revert to extend i8/i16 return values on Darwin (PR26665)
Hans Wennborg via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 18 10:17:05 PST 2016
Author: hans
Date: Thu Feb 18 12:17:05 2016
New Revision: 261235
URL: http://llvm.org/viewvc/llvm-project?rev=261235&view=rev
Log:
Revert to extend i8/i16 return values on Darwin (PR26665)
In r260133, LLVM was changed to no longer extend i8/i16 return values,
as it's not required by the ABI. However, code was found in the wild
that relies on the old behaviour on Darwin, so this commit reverts
back to that old behaviour for Darwin.
On other platforms, it's less likely that code would be depending on
the old behaviour, as GCC and MSVC haven't been extending such return
values.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/3addr-16bit.ll
llvm/trunk/test/CodeGen/X86/divrem8_ext.ll
llvm/trunk/test/CodeGen/X86/return-ext.ll
llvm/trunk/test/CodeGen/X86/select.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=261235&r1=261234&r2=261235&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Feb 18 12:17:05 2016
@@ -2382,8 +2382,13 @@ EVT X86TargetLowering::getTypeForExtRetu
ISD::NodeType ExtendKind) const {
MVT ReturnMVT = MVT::i32;
- if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16) {
+ bool Darwin = Subtarget.getTargetTriple().isOSDarwin();
+ if (VT == MVT::i1 || (!Darwin && (VT == MVT::i8 || VT == MVT::i16))) {
// The ABI does not require i1, i8 or i16 to be extended.
+ //
+ // On Darwin, there is code in the wild relying on Clang's old behaviour of
+ // always extending i8/i16 return values, so keep doing that for now.
+ // (PR26665).
ReturnMVT = MVT::i8;
}
Modified: llvm/trunk/test/CodeGen/X86/3addr-16bit.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/3addr-16bit.ll?rev=261235&r1=261234&r2=261235&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/3addr-16bit.ll (original)
+++ llvm/trunk/test/CodeGen/X86/3addr-16bit.ll Thu Feb 18 12:17:05 2016
@@ -12,7 +12,7 @@ entry:
; 64BIT-LABEL: t1:
; 64BIT-NOT: movw %si, %ax
-; 64BIT: leal 1(%rsi), %ebx
+; 64BIT: leal 1(%rsi), %eax
%0 = icmp eq i16 %k, %c ; <i1> [#uses=1]
%1 = add i16 %k, 1 ; <i16> [#uses=3]
br i1 %0, label %bb, label %bb1
@@ -34,8 +34,8 @@ entry:
; 64BIT-LABEL: t2:
; 64BIT-NOT: movw %si, %ax
-; 64BIT: leal -1(%rsi), %ebx
-; 64BIT: movzwl %bx
+; 64BIT: leal -1(%rsi), %eax
+; 64BIT: movzwl %ax
%0 = icmp eq i16 %k, %c ; <i1> [#uses=1]
%1 = add i16 %k, -1 ; <i16> [#uses=3]
br i1 %0, label %bb, label %bb1
@@ -59,7 +59,7 @@ entry:
; 64BIT-LABEL: t3:
; 64BIT-NOT: movw %si, %ax
-; 64BIT: leal 2(%rsi), %ebx
+; 64BIT: leal 2(%rsi), %eax
%0 = add i16 %k, 2 ; <i16> [#uses=3]
%1 = icmp eq i16 %k, %c ; <i1> [#uses=1]
br i1 %1, label %bb, label %bb1
@@ -82,7 +82,7 @@ entry:
; 64BIT-LABEL: t4:
; 64BIT-NOT: movw %si, %ax
-; 64BIT: leal (%rsi,%rdi), %ebx
+; 64BIT: leal (%rsi,%rdi), %eax
%0 = add i16 %k, %c ; <i16> [#uses=3]
%1 = icmp eq i16 %k, %c ; <i1> [#uses=1]
br i1 %1, label %bb, label %bb1
Modified: llvm/trunk/test/CodeGen/X86/divrem8_ext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/divrem8_ext.ll?rev=261235&r1=261234&r2=261235&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/divrem8_ext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/divrem8_ext.ll Thu Feb 18 12:17:05 2016
@@ -6,9 +6,9 @@ target triple = "x86_64-apple-macosx10.1
define zeroext i8 @test_udivrem_zext_ah(i8 %x, i8 %y) {
; CHECK-LABEL: test_udivrem_zext_ah
; CHECK: divb
-; CHECK: movzbl %ah, %e[[REG_REM:[a-z]]]x
+; CHECK: movzbl %ah, [[REG_REM:%[a-z0-9]+]]
; CHECK: movb %al, ([[REG_ZPTR:%[a-z0-9]+]])
-; CHECK: movb %[[REG_REM]]l, %al
+; CHECK: movl [[REG_REM]], %eax
; CHECK: ret
%div = udiv i8 %x, %y
store i8 %div, i8* @z
@@ -51,9 +51,9 @@ define signext i8 @test_sdivrem_sext_ah(
; CHECK-LABEL: test_sdivrem_sext_ah
; CHECK: cbtw
; CHECK: idivb
-; CHECK: movsbl %ah, %e[[REG_REM:[a-z]]]x
+; CHECK: movsbl %ah, [[REG_REM:%[a-z0-9]+]]
; CHECK: movb %al, ([[REG_ZPTR]])
-; CHECK: movb %[[REG_REM]]l, %al
+; CHECK: movl [[REG_REM]], %eax
; CHECK: ret
%div = sdiv i8 %x, %y
store i8 %div, i8* @z
Modified: llvm/trunk/test/CodeGen/X86/return-ext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/return-ext.ll?rev=261235&r1=261234&r2=261235&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/return-ext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/return-ext.ll Thu Feb 18 12:17:05 2016
@@ -1,5 +1,6 @@
; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=DARWIN %s
@x = common global i32 0, align 4
@@ -29,6 +30,13 @@ entry:
; CHECK: cmp
; CHECK-NEXT: sete
; CHECK-NEXT: ret
+
+; Except on Darwin, for legacy reasons.
+; DARWIN-LABEL: unsigned_i8:
+; DARWIN: cmp
+; DARWIN-NEXT: sete
+; DARWIN-NEXT: movzbl
+; DARWIN-NEXT: ret
}
define signext i8 @signed_i8() {
@@ -43,6 +51,13 @@ entry:
; CHECK: cmp
; CHECK-NEXT: sete
; CHECK-NEXT: ret
+
+; Except on Darwin, for legacy reasons.
+; DARWIN-LABEL: signed_i8:
+; DARWIN: cmp
+; DARWIN-NEXT: sete
+; DARWIN-NEXT: movzbl
+; DARWIN-NEXT: ret
}
@a = common global i16 0
@@ -59,6 +74,13 @@ entry:
; CHECK: movw
; CHECK-NEXT: addw
; CHECK-NEXT: ret
+
+; Except on Darwin, for legay reasons.
+; DARWIN-LABEL: unsigned_i16:
+; DARWIN: movw
+; DARWIN-NEXT: addw
+; DARWIN-NEXT: movzwl
+; DARWIN-NEXT: ret
}
Modified: llvm/trunk/test/CodeGen/X86/select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/select.ll?rev=261235&r1=261234&r2=261235&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/select.ll (original)
+++ llvm/trunk/test/CodeGen/X86/select.ll Thu Feb 18 12:17:05 2016
@@ -66,10 +66,10 @@ entry:
%2 = load i8, i8* %1, align 1 ; <i8> [#uses=1]
ret i8 %2
; CHECK-LABEL: test4:
-; CHECK: movb ({{.*}},4), %al
+; CHECK: movsbl ({{.*}},4), %eax
; ATOM-LABEL: test4:
-; ATOM: movb ({{.*}},4), %al
+; ATOM: movsbl ({{.*}},4), %eax
}
define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind {
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