[PATCH] D16836: [CodeGenPrepare] Don't transform select instructions into branches when both of operands are cheap

[Gerolf Hoflehner via llvm-commits]

Gerolf added a subscriber: Gerolf.
Gerolf added a comment.

In this case there could be another issue coming into play. Some of the discussions centering around the IR heuristics assume but don’t check that the target is OoO. What if the core is in-order? Or is this a non-issue anymore for x86 even in the embedded space?

Overall I think Sanjay’s thought about pushing the optimization/tuning down to the MachineCombiner goes in the right direction. As a local peephole this kind of tuning always seems to end up giving mixed performance results over time. I have seen this before on Itanium and more recently on ARM64 where for some time a local patch for tuning the sFormingBranchFromSelectProfitable heuristics gave some gains on “commercial benchmarks” for a few months before they vanished again because of changes to the instruction mix.

-Gerolf


http://reviews.llvm.org/D16836