[llvm] r260164 - [regalloc][WinEH] Do not mark intervals as not spillable if they contain a regmask

David Majnemer via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 17 09:37:03 PST 2016


Could we get this merged into 3.8?

On Mon, Feb 8, 2016 at 2:52 PM, Andrew Kaylor via llvm-commits <
llvm-commits at lists.llvm.org> wrote:

> Author: akaylor
> Date: Mon Feb  8 16:52:51 2016
> New Revision: 260164
>
> URL: http://llvm.org/viewvc/llvm-project?rev=260164&view=rev
> Log:
> [regalloc][WinEH] Do not mark intervals as not spillable if they contain a
> regmask
>
> Differential Revision: http://reviews.llvm.org/D16831
>
>
> Added:
>     llvm/trunk/test/CodeGen/X86/regalloc-spill-at-ehpad.ll
> Modified:
>     llvm/trunk/include/llvm/CodeGen/LiveInterval.h
>     llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp
>     llvm/trunk/lib/CodeGen/LiveInterval.cpp
>
> Modified: llvm/trunk/include/llvm/CodeGen/LiveInterval.h
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LiveInterval.h?rev=260164&r1=260163&r2=260164&view=diff
>
> ==============================================================================
> --- llvm/trunk/include/llvm/CodeGen/LiveInterval.h (original)
> +++ llvm/trunk/include/llvm/CodeGen/LiveInterval.h Mon Feb  8 16:52:51 2016
> @@ -544,6 +544,11 @@ namespace llvm {
>        return true;
>      }
>
> +    // Returns true if any segment in the live range contains any of the
> +    // provided slot indexes.  Slots which occur in holes between
> +    // segments will not cause the function to return true.
> +    bool isLiveAtIndexes(ArrayRef<SlotIndex> Slots) const;
> +
>      bool operator<(const LiveRange& other) const {
>        const SlotIndex &thisIndex = beginIndex();
>        const SlotIndex &otherIndex = other.beginIndex();
>
> Modified: llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp?rev=260164&r1=260163&r2=260164&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp (original)
> +++ llvm/trunk/lib/CodeGen/CalcSpillWeights.cpp Mon Feb  8 16:52:51 2016
> @@ -213,8 +213,11 @@ VirtRegAuxInfo::calculateSpillWeightAndH
>    if (!Spillable)
>      return;
>
> -  // Mark li as unspillable if all live ranges are tiny.
> -  if (li.isZeroLength(LIS.getSlotIndexes())) {
> +  // Mark li as unspillable if all live ranges are tiny and the interval
> +  // is not live at any reg mask.  If the interval is live at a reg mask
> +  // spilling may be required.
> +  if (li.isZeroLength(LIS.getSlotIndexes()) &&
> +      !li.isLiveAtIndexes(LIS.getRegMaskSlots())) {
>      li.markNotSpillable();
>      return;
>    }
>
> Modified: llvm/trunk/lib/CodeGen/LiveInterval.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveInterval.cpp?rev=260164&r1=260163&r2=260164&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/LiveInterval.cpp (original)
> +++ llvm/trunk/lib/CodeGen/LiveInterval.cpp Mon Feb  8 16:52:51 2016
> @@ -748,6 +748,40 @@ void LiveRange::flushSegmentSet() {
>    verify();
>  }
>
> +bool LiveRange::isLiveAtIndexes(ArrayRef<SlotIndex> Slots) const {
> +  ArrayRef<SlotIndex>::iterator SlotI = Slots.begin();
> +  ArrayRef<SlotIndex>::iterator SlotE = Slots.end();
> +
> +  // If there are no regmask slots, we have nothing to search.
> +  if (SlotI == SlotE)
> +    return false;
> +
> +  // Start our search at the first segment that ends after the first slot.
> +  const_iterator SegmentI = find(*SlotI);
> +  const_iterator SegmentE = end();
> +
> +  // If there are no segments that end after the first slot, we're done.
> +  if (SegmentI == SegmentE)
> +    return false;
> +
> +  // Look for each slot in the live range.
> +  for ( ; SlotI != SlotE; ++SlotI) {
> +    // Go to the next segment that ends after the current slot.
> +    // The slot may be within a hole in the range.
> +    SegmentI = advanceTo(SegmentI, *SlotI);
> +    if (SegmentI == SegmentE)
> +      return false;
> +
> +    // If this segment contains the slot, we're done.
> +    if (SegmentI->contains(*SlotI))
> +      return true;
> +    // Otherwise, look for the next slot.
> +  }
> +
> +  // We didn't find a segment containing any of the slots.
> +  return false;
> +}
> +
>  void LiveInterval::freeSubRange(SubRange *S) {
>    S->~SubRange();
>    // Memory was allocated with BumpPtr allocator and is not freed here.
>
> Added: llvm/trunk/test/CodeGen/X86/regalloc-spill-at-ehpad.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/regalloc-spill-at-ehpad.ll?rev=260164&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/X86/regalloc-spill-at-ehpad.ll (added)
> +++ llvm/trunk/test/CodeGen/X86/regalloc-spill-at-ehpad.ll Mon Feb  8
> 16:52:51 2016
> @@ -0,0 +1,75 @@
> +; RUN: llc -regalloc=greedy -mtriple=x86_64-pc-windows-msvc  < %s -o - |
> FileCheck %s
> +
> +; This test checks for proper handling of a condition where the greedy
> register
> +; allocator encounters a very short interval that contains no uses but
> does
> +; contain an EH pad unwind edge, which requires spilling.  Previously the
> +; register allocator marked a interval like this as unspillable,
> resulting in
> +; a compilation failure.
> +
> +
> +; The following checks that the value %p is reloaded within the catch
> handler.
> +; CHECK-LABEL: "?catch$8@?0?test at 4HA":
> +; CHECK:           .seh_endprologue
> +; CHECK:           movq    -16(%rbp), %rax
> +; CHECK:           movb    $0, (%rax)
> +
> +define i32* @test(i32* %a) personality i8* bitcast (i32 (...)*
> @__CxxFrameHandler3 to i8*) {
> +entry:
> +  %call = call i32 @f()
> +  %p = bitcast i32* %a to i8*
> +  br i1 undef, label %if.end, label %if.else
> +
> +if.else:                                          ; preds = %entry
> +  br i1 undef, label %cond.false.i, label %if.else.else
> +
> +if.else.else:                                     ; preds = %if.else
> +  br i1 undef, label %cond.true.i, label %cond.false.i
> +
> +cond.true.i:                                      ; preds = %if.else.else
> +  br label %invoke.cont
> +
> +cond.false.i:                                     ; preds =
> %if.else.else, %if.else
> +  %call.i = invoke i32 @f()
> +          to label %invoke.cont unwind label %catch.dispatch
> +
> +catch.dispatch:                                   ; preds = %cond.false.i
> +  %tmp0 = catchswitch within none [label %catch] unwind label %ehcleanup
> +
> +catch:                                            ; preds =
> %catch.dispatch
> +  %tmp1 = catchpad within %tmp0 [i8* null, i32 64, i8* null]
> +  %p.0 = getelementptr inbounds i8, i8* %p, i64 0
> +  store i8 0, i8* %p.0, align 8
> +  invoke void @_CxxThrowException(i8* null, %eh.ThrowInfo* null) [
> "funclet"(token %tmp1) ]
> +          to label %noexc unwind label %ehcleanup
> +
> +noexc:                                            ; preds = %catch
> +  unreachable
> +
> +invoke.cont:                                      ; preds =
> %cond.false.i, %cond.true.i
> +  %cond.i = phi i32 [ %call, %cond.true.i ], [ %call.i, %cond.false.i ]
> +  %cmp = icmp eq i32 %cond.i, -1
> +  %tmp3 = select i1 %cmp, i32 4, i32 0
> +  br label %if.end
> +
> +if.end:                                           ; preds = %invoke.cont,
> %entry
> +  %state.0 = phi i32 [ %tmp3, %invoke.cont ], [ 4, %entry ]
> +  %p.1 = getelementptr inbounds i8, i8* %p, i64 0
> +  invoke void @g(i8* %p.1, i32 %state.0)
> +          to label %invoke.cont.1 unwind label %ehcleanup
> +
> +invoke.cont.1:                                    ; preds = %if.end
> +  ret i32* %a
> +
> +ehcleanup:                                        ; preds = %if.end,
> %catch, %catch.dispatch
> +  %tmp4 = cleanuppad within none []
> +  cleanupret from %tmp4 unwind to caller
> +}
> +
> +%eh.ThrowInfo = type { i32, i32, i32, i32 }
> +
> +declare i32 @__CxxFrameHandler3(...)
> +
> +declare void @_CxxThrowException(i8*, %eh.ThrowInfo*)
> +
> +declare i32 @f()
> +declare void @g(i8*, i32)
>
>
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