[PATCH] D17289: [X86] Fix False Data Dependency in popcnt

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 17 08:04:09 PST 2016


spatel requested changes to this revision.
spatel added a reviewer: spatel.
spatel added a comment.
This revision now requires changes to proceed.

In http://reviews.llvm.org/D17289#354614, @RKSimon wrote:

> Your current implementation would affect AMD Jaguar / Bulldozer families as well despite them not suffering from the dependency bug.


Even if that wasn't the case, hijacking hasAVX() and hasPOPCNT() to predicate this is the wrong approach.

> It looks like this might need to be hidden behind a feature bit (e.g. FeaturePOPCNTFalseDependency) instead of trying to decode the cpu from the target bits.

> 

> I should also add that there is a discussion on PR26183 about whether these types of fixes should all be put under the MachineCombiner pass.


This is a machine pass, so we shouldn't need to pollute the general CPU feature bits. We have access to the machine models. How about subclassing/adding a bit to MCSchedModel for only the affected CPUs? From its description, it sounds like the right place for this type of "feature":

  /// The machine model directly provides basic information about the
  /// microarchitecture to the scheduler in the form of properties. It also
  /// optionally refers to scheduler resource tables and itinerary
  /// tables. Scheduler resource tables model the latency and cost for each
  /// instruction type.


Repository:
  rL LLVM

http://reviews.llvm.org/D17289





More information about the llvm-commits mailing list